基于ADRES处理器的并行FFT设计及实现  

A Design and Implementation of Parallel FFT Based on ADRES

作　　者：李世平 陈铠[2] 陈晓东[2] 周海斌[2] 何国强 LI Shiping;CHEN Kai;CHEN Xiaodong;ZHOU Haibin;HE Guoqiang(Jiangsu Huachuang Microsystem Co.,Ltd,Nanjing 211899,China;Nanjing Research Institute of Electronics Technology,Nanjing 210039,China)

机构地区：[1]江苏华创微系统有限公司,南京211899 [2]南京电子技术研究所,南京210039

出　　处：《现代雷达》2022年第10期59-64,共6页Modern Radar

基　　金：国家某重大工程专项资助课题(201-CXCY-B05-04-02-02);国家某重大项目资助课题(2009ZYHJ0010);江苏省成果转化专项资助课题(BA2020013)。

摘　　要：根据动态可重构嵌入式系统架构(ADRES)处理器单指令多数据流(SIMD)结构的特点,提出了一种基于SIMD的并行化快速傅里叶变换(FFT)算法,其在每个指令周期并行执行8个基4蝶形运算,同时将数据混洗和地址倒序操作嵌入向量蝶形运算过程中执行,既保证了向量运算的并行度,也掩盖了FFT结果倒序所需的时间。该算法在ADRES处理器上实现,结果显示,与其他同等规模运算资源的处理器相比,处理性能达到1.1~10倍。According to the SIMD(Single Instruction Multiple Data) characteristics of ADRES(Architecture for Dynamic Reconfigurable Embedded System, ADRES) processor, a parallel FFT algorithm based on SIMD was presented to improve the performance in this paper. Eight radix-4 butterflies were parallel calculated in each instruction cycle. At the same time, data shuffling and address reverse order were embedded in the vector butterfly calculation. These two methods both ensure the parallelism of vector computation and hide the time of FFT results′ order inversion. The SIMD FFT algorithm was implemented on ADRES processor and simulated results demonstrate that the calculation speed is about 1.1~10 times as other FFT algorithms with the same scale of computed element.

关 键 词：并行FFT 单指令多数据流 向量蝶形运算 

分 类 号：TN957[电子电信—信号与信息处理]