基于FPGA+DSP的高清视频监控系统研究  

Research on HD Video Surveillance System Based on FPGA+DSP

作　　者：王笑寒 韩文波[1] WANG Xiaohan;HAN Wenbo(School of Opto-Electronic Engineering,Changchun University of Science and Technology,Changchun 130022)

机构地区：[1]长春理工大学光电工程学院,长春130022

出　　处：《长春理工大学学报（自然科学版）》2022年第6期67-72,共6页Journal of Changchun University of Science and Technology(Natural Science Edition)

基　　金：吉林省科技厅项目(20200401066GX)。

摘　　要：为了解决安防监控系统高清晰度、高实时性的采集需求,以FPGA+DSP为控制核心设计了一套高速实时图像采集与处理系统。系统采用Camera Link Full模式接口模式,以FPGA替代传统的串并转换芯片,使图像采集系统传输速率可高达185 Mb/s,且在Full模式下可同时传输64路并行数据,使系统每秒可达到11 Gb的数据量,保证了4 K分辨率下稳定采集图像需求。系统选用两片DDR2采用兵乓操作模式进行数据储存,最高可达到17 Gb/S的高速数据存储。系统以DSP为核心,采用改进的H.264视频压缩算法,实现了高达156的压缩比,压缩后的传输速度满足实时视频监控传输需求。实验结果表明,系统实现了4 K超高清分辨率下的数据稳定采集及可靠传输。In order to meet the acquisition requirements of high definition and high real-time in security monitoring system,in this paper,a high-speed real-time image acquisition and processing system based on FPGA+DSP is designed.In the system,Camera Link Full mode interface mode is adopted;and FPGA is used to replace the traditional serial conversion chip,then the transmission rate of the image acquisition system can be up to 185 Mb/s;and 64 parallel data can be simultaneously transmitted in Full mode,11 Gb of data per second can be achieved.The stable image acquisition requirement under 4 K resolution is guaranteed.Two DDR2 pieces are used to store data in ping-pong mode,up to 17 Gb/S of highspeed data storage.DSP is taken as the core and the improved H.264 video compression algorithm is adopted to achieve a compression ratio of up to 156,and the transmission speed after compression meets the requirements of real-time video surveillance transmission.Experimental results show that the system achieves stable data acquisition and reliable data transmission under 4 K ultra-high resolution.

关 键 词：Cameralink Full接口 FPGA图像采集 4 K高清采集与传输 DSP硬件压缩 

分 类 号：TN914[电子电信—通信与信息系统]