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作 者:贾冒华 童琼 孔令磊 JIA Mao-hua;TONG Qiong;KONG Ling-lei(Beijing Institute of Radio Metrology and Measurement,Beijing 100039,China;The First Military Representative Office of the Air Force Armament Department in Beijing,Beijing 100039,China)
机构地区:[1]北京无线电计量测试研究所,北京100039 [2]空装驻北京地区第一军事代表室,北京100039
出 处:《宇航计测技术》2022年第5期34-37,51,共5页Journal of Astronautic Metrology and Measurement
摘 要:随着现代科技的发展,信息传输系统的工作速率不断拓宽,要求用于其可靠性、稳定性评测的误码率测试设备具备超宽速率的测试图形产生能力。本文提出了一种用于误码率测试设备的超宽速率图形产生方法,该方法将50 Mb/s~60 Gb/s的超宽速率分解为四个速率段,并通过高速开关实现输出图形信号的切换。文中基于FPGA(现场可编程逻辑门阵列)+多级MUX(多路复用器)的图形产生架构搭建了测试系统,通过对整个工作速率范围进行分解,最终实现了一路50 Mb/s~60 Gb/s范围内超宽速率测试图形信号的产生。With the development of modern technology, the working rate of information transmission system is constantly expanding, so Bit Error Rate Tester must have the ability of generate Ultra-wide rate test pattern for reliability and stability evaluation.The article propose a method for generate Ultra-wide rate test pattern, it break the Ultra-wide rate test pattern of 50 Mb/s~60 Gb/s down into four pieces, and use high-speed switch to choose output pattern.In the article, we built a test system based on FPGA(field-programmable gate array) + multi MUX(multiplexer) architecture, by decompose the whole range of working rate, finally generate a Ultra-wide rate test pattern of 50 Mb/s~60 Gb/s.
分 类 号:TN98[电子电信—信息与通信工程]
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