基于FPGA的RS-422/485芯片自动化测试平台的设计与实现  

The design and implementation of the RS-422/485 chip automatic test platform based on FPGA

作　　者：宋晨阳 吴松 何威 时晓升 SONG Chenyang;WU Song;HE Wei;SHI Xiaosheng(China Electronics Technology Group Corporation,NO.58 Research Institute,Wuxi 214072,China)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214072

出　　处：《电子设计工程》2023年第1期163-166,171,共5页Electronic Design Engineering

摘　　要：针对芯片ATE测试存在程序开发复杂、设备昂贵等缺点,难以应用在芯片研发实验阶段的问题,通过硬件设计、软件设计和上位机界面开发,实现了一种基于FPGA的RS-422/485芯片自动化测试平台。该平台可以实现多种国产隔离、非隔离型RS-422/485收发芯片的自动化测试,满足实验环境下的芯片通信能力测试要求。三款国产芯片在3 V和5 V两种标准工作电压下,0~10 Mb/s通信速率范围内,通信误码率都为0。实验结果表明,三款国产芯片可以实现对国外同类型产品的功能替代。In view of the disadvantages of complex program development and expensive equipment for chip ATE testing,it is difficult to apply in the chip development and test stage,an automatic testing platform for RS-422/485 chip based on FPGA is realized through hardware design,software design and host computer interface development.This platform can realize the automated test of a variety of domestic isolated and non⁃isolated RS-422/485 transceiver chips to meet the requirements of chip communication capability testing in the experimental environment.Under the two standard operating voltages of 3 V and 5 V,the three domestic chips have a communication rate of 0 within the communication rate range of 0~10 Mb/s.The test results show that the three domestic chips can replace the functions of the same type of foreign products.

关 键 词：RS-422/485 国产芯片 自动化 芯片测试 

分 类 号：TN91[电子电信—通信与信息系统]