一种高效率升压型DC-DC转换器设计  被引量:1

A High-Efficiency Step-up DC-DC Converter Design

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作  者:易磊 夏晓娟[1,2] 庄玉成 丁可柯[1,2] 张洪俞 YI Lei;XIA Xiaojuan;ZHUANG Yucheng;DING Keke;ZHANG Hongyu(College of Electronic and Optical Engineering&College of Microelectronics,Nanjing University of Posts and Telecommunications,Nanjing Jiangsu 210023,China;National and Local Joint Engineering Laboratory for RF Integration and Micro-Assembly Technology,Nanjing University of Posts and Telecommunications,Nanjing Jiangsu 210023,China;Nanjing Micro One Electronics Inc.,Nanjing Jiangsu 210042,China)

机构地区:[1]南京邮电大学电子与光学工程学院/微电子学院,江苏南京210023 [2]南京邮电大学射频集成与微组装技术国家地方联合工程实验室,江苏南京210023 [3]南京微盟电子有限公司,江苏南京210042

出  处:《电子器件》2022年第6期1329-1334,共6页Chinese Journal of Electron Devices

基  金:航空科学基金项目(20182412009)。

摘  要:设计了一种基于PWM/PFM调制模式的全负载高效率升压型DC-DC转换器。根据负载不同,实现PWM和PFM模式的自动切换。轻载时,进入PFM模式,降低开关损耗,并加入电感峰值限流,减小输出电压纹波。在DCM状态下,利用休眠模式电路,降低静态功耗,同时提出一种抗振铃电路,进一步提升轻载转换效率。芯片实测结果表明,1 mA轻载条件下,效率依然达到91.6%,输出电压纹波约为6.6 mV。全负载最高效率可以达到93.1%。A full-load high-efficiency boost DC-DC converter based on PWM/PFM modulation mode is designed.Automatic switching between PWM and PMF modes according to different loads is realized.At light load,the converter enters PFM mode to reduce switching loss,and adds inductor peak current limit to reduce output voltage ripple.In the DCM state,the sleep mode circuit is used to reduce the static power consumption,and an anti-ringing circuit is proposed to further improve the light-load conversion efficiency.The actual test result of the chip shows that under the light load condition of 1 mA,the efficiency still reaches 91.6%,and the output voltage ripple is about 6.6 mV.The maximum efficiency at full load can reach 93.1%.

关 键 词:PWM/PFM调制 休眠模式 抗振铃 高效率 

分 类 号:TN710[电子电信—电路与系统]

 

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