一种面向序列密码的混合粒度并行运算单元  

A Hybrid Granularity Parallel Arithmetical Unit for Stream Cipher

作　　者：曲彤洲 戴紫彬[1] 陈琳[1] 刘燕江 QU Tongzhou;DAI Zibin;CHEN Lin;LIU Yanjiang(The PLA Information Engineering University,Zhengzhou 450000,China)

机构地区：[1]战略支援部队信息工程大学,郑州450000

出　　处：《电子与信息学报》2023年第1期78-86,共9页Journal of Electronics & Information Technology

基　　金：核高基国家科技重大专项(2014ZX01027-201-001)。

摘　　要：针对可重构密码处理器对于不同域上的序列密码算法兼容性差、实现性能低的问题,该文分析了序列密码算法的多级并行性并提出了一种反馈移位寄存器(FSR)的预抽取更新模型。进而基于该模型设计了面向密码阵列架构的可重构反馈移位寄存器运算单元(RFAU),兼容不同有限域上序列密码算法的同时,采取并行抽取和流水处理策略开发了序列密码算法的反馈移位寄存器级并行性,从而有效提升了粗粒度可重构阵列(CGRA)平台上序列密码算法的处理性能。实验结果表明与其他可重构处理器相比,对于有限域(GF)(2)上的序列密码算法,RFAU带来的性能提升为23%~186%;对于GF(2u)域上的序列密码算法,性能提升达约66%~79%,且面积效率提升约64%~91%。For stream cipher algorithms of different granularity, reconfigurable cryptographic processors have poor compatibility and low implementation performance. In this paper, the multi-level parallelism of stream cipher algorithms is analyzed and a pre-extraction update model of the Feedback Shift Register(FSR) is established. Based on this, a Reconfigurable Feedback-shift-register Arithmetic Unit(RFAU) is proposed to apply to the cryptographic array architecture, which can be compatible with stream cipher algorithms on different Galois fields. Moreover, parallel extraction and pipeline processing strategies are executed to exploit the FSR-level parallelism of stream cipher, which effectively improve the performance of stream cryptographic algorithms on the Coarse-Grained Reconfigurable Array(CGRA) platform. The experimental results show that the performance improvement of the experimental platform brought by RFAU is reached about 23%~186% for the stream ciphers on the Galois Field(GF)(2), compared with the other reconfigurable processors. For the stream ciphers on the GF(2u) field, the throughput rate is improved to about 66%~79%, and the area efficiency is enhanced to about 64%~91%.

关 键 词：粗粒度可重构阵列 序列密码算法 反馈移位寄存器 流水线 

分 类 号：TN492[电子电信—微电子学与固体电子学] TP309.7[自动化与计算机技术—计算机系统结构]