基于部分积概率分析的高精度低功耗近似浮点乘法器设计  

Design of High Precision Low Power Approximate Floating-point Multiplier Based on Partial Product Probability Analysis

作　　者：闫成刚 赵轩 徐宸宇 陈珂 葛际鹏 王成华[1] 刘伟强[1] YAN Chenggang;ZHAO Xuan;XU Chenyu;CHEN Ke;GE Jipeng;WANG Chenghua;LIU Weiqiang(College of Electronic and Information Engineering/College of Integrated Circuits,Nanjing University of Aeronautics and Astronautics,Nanjing 211106,China)

机构地区：[1]南京航空航天大学电子信息工程学院/集成电路学院,南京211106

出　　处：《电子与信息学报》2023年第1期87-95,共9页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(62101246,62022041,62101252);江苏省自然科学基金(BK20200417);江苏省双创博士专项资金(2020-30377)。

摘　　要：浮点乘法器是高动态范围(HDR)图像处理、无线通信等系统中的关键运算单元,其相比于定点乘法器动态范围更广,但复杂度更高。近似计算作为一种新兴范式,在受限的精度损失范围内,可大幅降低硬件资源和功耗开销。该文提出一种16 bit半精度近似浮点乘法器(App-Fp-Mul),针对浮点乘法器中的尾数乘法模块,根据其部分积阵列中出现1的概率,提出一种对输入顺序不敏感的近似4-2压缩器及低位或门压缩方法,在精度损失较小的条件下有效降低了浮点乘法器资源及功耗。相较于精确设计,所提近似浮点乘法器在归一化平均错误距离(NMED)为0.0014时,面积及功耗延时积方面分别降低20%及58%;相较于现有近似设计,在近似位宽相同时具有更高的精度及更小的功耗延时积。最后将该文所提近似浮点乘法器应用于高动态范围图像处理,相比现有主流方案,峰值信噪比和结构相似性分别达到83.16 dB和99.9989%,取得了显著的提升。Floating-point multipliers are the key operational units in High Dynamic Range(HDR) image processing and wireless communication systems. Compared to the fixed-point multipliers, floating-point multipliers have a higher dynamic range and also higher complexity. As a newly emerging paradigm, the hardware resources and power consumption of the circuits can be greatly reduced by approximate computing within an acceptable accuracy loss. According to the probability of 1 in the partial product array, an Approximate Floating-point Multiplier(App-Fp-Mul) is proposed in this paper. An approximate 4-2 compressor and or-gate based compression method are proposed to reduce the resource and power consumption of the floating-point multiplier with small precision loss. Compared with the accurate design, the proposed approximate floating-point multiplier can reduce the area, and power delay product by 20%, and 58%respectively when the Normalized Mean Error Distance(NMED) is 0.0014. And the proposed floating-point multiplier has higher accuracy and a smaller power delay product than the existing approximate designs with the same approximate bit width. Finally, the proposed approximate floating-point multiplier is verified with high dynamic range image processing application. The result of processing can reach 83.16 dB peak signal to noise ratio and 99.9989% structure similarity, which is obviously better than the existing approximate design.

关 键 词：近似计算 近似浮点乘法器 部分积概率分析 低功耗 

分 类 号：TN911[电子电信—通信与信息系统] TP331.2[电子电信—信息与通信工程]