基于FPGA与DSP架构的接收机设计  

Receiver design based on FPGA and DSP architecture

作　　者：刘成 彭思 林选锋 LIU Cheng;PENG Si;LIN Xuanfeng(Science and Technology on Electronic Information Control Laboratory,Chengdu 610036,China)

机构地区：[1]电子信息控制重点实验室,四川成都610036

出　　处：《电子设计工程》2023年第3期141-144,共4页Electronic Design Engineering

摘　　要：该文以接收机设计和实现为目标,介绍了全球导航卫星系统测量原理、工程设计方案、测试方法和测试结果。在硬件架构上,采用了基于软件无线电思想的FPGA+DPS平台来实现接收机定位算法。其中,射频前端采用MAX2769单芯片解决方案,FPGA完成基带信号处理,DSP完成控制和定位解算功能。采用了GSS6560导航星模拟器对设计方案进行验证,经过数据统计在理想情况下位置测量均方误差为6.49 m,速度测量均方误差为0.17 m/s,测试结果证明了该设计方案的可行性。Aiming at the design and implementation of receiver,this paper introduces the measurement principle,engineering implementation scheme,test method and test results of the global navigation satellite system. In the hardware architecture,the FPGA + DSP platform based on the idea of software radio is used of realize the receiver algorithm. The RF front-end adopts MAX2769 single chip solution,FPGA completes baseband signal processing,and DSP completes control and positioning calculation functions. GSS6565 navigation star simulator is used to verify the design scheme. Through data statistics,in the ideal case,the position mean square error is 6.49 m and the velocity mean error is 0.17 m/s. The test results prove the feasibility of the design scheme.

关 键 词：接收机 FPGA DSP 软件无线电 

分 类 号：TN966[电子电信—信号与信息处理]