基于优化正弦幅度相位相减法的并行高速ASIC数控振荡器设计  

A Parallel High-speed ASIC Numerically Controlled Oscillator Based on Optimized Sine-phase Difference

作　　者：任凤霞 卓琳[1] 李琨 邵杰 万书芹[1] REN Fengxia;ZHUO Lin;LI Kun;SHAO Jie;WAN Shuqin(The 58th Research Institute,China Electronics Technology Group Corp.,Wuxi,Jiangsu,214035,CHN)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214035

出　　处：《固体电子学研究与进展》2022年第6期492-497,共6页Research & Progress of SSE

基　　金：江苏省自然基金资助项目(BK20211042);国家自然可学基金资助项目(62174149)。

摘　　要：设计了最高采样率为1 GHz的ASIC数控振荡器电路。采用优化的正弦幅度相位相减法实现相位幅值转换功能。应用MATLAB对数控振荡器输出的数据进行定点误差分析和频谱分析,设计的数控振荡器输出的正频率信号和负频率信号功能通过分析正交混频结果间接证明。根据MATLAB分析结果设计电路,并应用并行结构实现电路结构。最终设计的数控振荡器模块应用于ADC电路。基于65 nm CMOS工艺流片后,实际测试结果表明,所设计的模块能够满足输出正频率、负频率、输出最小频率间隔为0.24414 MHz,系统精度小于l LSB和最高采样率1 GHz的设计要求。A high-speed ASIC numerically controlled oscillator with the highest sample rate of1 GHz was designed.The phase-to-amplitude conversion function was implemented by an optimized sine-phase difference algorithm method.MATLAB was applied to fixed-point error analysis and spectral analysis of the data of output from the numerical control oscillator.The function of the positive frequency signal and negative frequency signal output by designed numerical control oscillator was indirectly demonstrated by analyzing the results of quadrature mixer.The circuit was designed according to the analysis results of MATLAB,and the circuit structure was realized by applying the parallel structure.The numerically controlled oscillator was integrated in an ADC circuit.Based on 65 nm CMOS process,the test results show that the designed module can satisfy the design requirements of output positive frequency,negative frequency,minimum output frequency interval of 0.24414 MHz,system accuracy of 1 LSB and maximum sampling rate of 1 GHz.

关 键 词：高速ASIC 数控振荡器 优化的正弦幅度相位相减法 MATLAB 正交混频 

分 类 号：TN432[电子电信—微电子学与固体电子学]