一种砷化镓工艺的双向真时延芯片设计  

GaAs bidirectional true time delay chip design

作　　者：郝东宁 张为 HAO Dongning;ZHANG Wei(School of Microelectronics,Tianjin University,Tianjin 300072,China)

机构地区：[1]天津大学微电子学院,天津300072

出　　处：《西安电子科技大学学报》2023年第1期102-108,128,共8页Journal of Xidian University

基　　金：国家基础加强重点项目基金(2019JCJQZD24603)。

摘　　要：采用0.25μm GaAs pHEMT E/D工艺实现了X/Ku波段的双向真时延芯片的设计。通过在新型长号型延时结构中增加双向选择开关,实现了低插入损耗波动的双向数控可调真时延电路。其延时单元采用四阶和二阶电感耦合全通滤波器实现,单位面积下具有较高的延时量,并通过双向有源开关选择延时路径来控制延时大小。延时芯片的工作带宽为6~18 GHz,可实现3位延时,最小延时步进为15 ps,最大延时范围为106 ps。仿真结果表明,其具有相对较低的插入损耗8.1~15 dB,且损耗随时延的波动小于±2 dB。芯片尺寸为1.91 mm^(2),群时延均方根误差小于10 ps,回波损耗大于15 dB,直流功耗为110 mW,输入1 dB压缩点大于7 dBm。An X/Ku-band bi-directional True-time delay is presented in 0.25μm GaAs pHEMT E/D technology.The bi-directional operation is realized by adding two-way selecting switches to the new trombone structure,and it has the advantage of low insertion loss variation among different delay states.Fourth-order and second-order inductive coupled all-pass networks are adopted to form two delay lines.The delay differences are controlled by selecting the delay path through the bi-directional active switches.The true-time delay operates with the bandwidth of 6~18 GHz,and it realizes a 3-bit delay with a minimal delay step of 15 ps and a maximal delay of 106 ps.Simulation results show insertion loss of 8.1~15 dB and the loss variation with delay is±2 dB.The group delay Root-Mean-Square error less than 10 ps and return loss more than 15 dB are implemented with the chip size of 1.91 mm^(2).The direct current consumption is 110 mW and the input P1dB is more than 7 dBm.

关 键 词：真时延 延时电路 砷化镓 全通滤波器 低插入损耗波动 

分 类 号：TN432[电子电信—微电子学与固体电子学]