基于FPGA控制的超声信号采集电路的设计  

Design of an ultrasonic signal acquisition circuit based on FPGA control

作　　者：凡丽梅 董方旭 周浩 张瑛 FAN Limei;DONG Fangxu;ZHOU Hao;ZHANG Ying(Shandong Institute of Non-Metallic Materials,Jinan 250031,China;North University of China,Taiyuan 030051,China)

机构地区：[1]山东非金属材料研究所,济南250031 [2]中北大学,太原030051

出　　处：《兵器装备工程学报》2022年第S02期164-168,共5页Journal of Ordnance Equipment Engineering

摘　　要：针对超声检测信号采样过程中出现的速度慢、精度低等问题,设计了一种基于FPGA控制的超声信号采集电路。根据设计要求,在确定开发元器件的基础上,采用上下位机的设计理念,以FPGA为控制核心,完成控制模块、AD转换模块、数据存储模块、传输模块和人机交互模块等部分的设计,利用NISO II软核处理器,通过片上系统的搭建,对采集电路进行总体控制,对信号的实时存储与传输进行适配。经验证:本电路以最高为50 MHz的采样频率对信号进行无失真采集、传输与显示。As a new nondestructive testing technology,ultrasonic testing technology is more and more widely used in defect testing.Aiming at the problems of low speed and low precision in ultrasonic detection signal sampling process,this paper designs an ultrasonic signal acquisition circuit based on FPGA control.According to the design requirements,on the basis of determining the development components,the design concept of upper and lower computers is adopted.The design of the control module,AD conversion module,data storage module,transmission module and human-computer interaction module is completed with FPGA as the control core.The NISO II soft core processor is used to build the system on chip.The overall control of the acquisition circuit is carried out.The real-time storage and transmission of signals are adapted.It is proved by experiment that the circuit can collect,transmit and display the signal without distortion at the sampling frequency of 50 MHz.

关 键 词：FPGA 信号采集 超声检测 采样频率 

分 类 号：TP751.2[自动化与计算机技术—检测技术与自动化装置]