基于FPGA异构计算的数据协调系统设计  

Design of Data Reconciliation System Based on FPGA Heterogeneous Computing

作　　者：刘佳森 郭大波[1,2] 郭天昊 李仙钟 王玉杰 孟颖岫 Liu Jiasen;Guo Dabo;Guo Tianhao;Li Xianzhong;Wang Yujie;Meng Yingxiu(College of Physics and Electronic Engineering,Shanxi University,Taiyuan 030006,Shanxi,China;School of Information and Intelligent Engineering,University of Sanya,Sanya 572022,Hainan,China)

机构地区：[1]山西大学物理电子工程学院,山西太原030006 [2]三亚学院信息与智能工程学院,海南三亚572022

出　　处：《光学学报》2023年第2期236-245,共10页Acta Optica Sinica

基　　金：山西省基础研究项目(201801D121118);三亚学院人才引进项目(USYRC22-14)。

摘　　要：针对当前连续变量量子密钥分发系统数据协调运算速度慢的问题,采用高性能FPGA板为加速设备,在OpenCL异构计算框架上实现了八维数据协调算法的并行加速运算。针对FPGA的特点,所提算法进行了如下优化:1)优化for循环表达方式,使OpenCL编译器能更好地理解设计意图,以生成有效的FPGA硬件结构,速度提高50%以上;2)内存优化,根据LDPC解码置信传播算法的特点,设计了一种哑铃式内核架构和核内、核间信息传播方式,速度提高了近1倍;3)使用聚合访问的数据读取模式减少并行工作项数量,速度提高了1倍多。仿真结果显示,在码长为2×105bit的情况下,代码优化后的协调速率为优化前的2.17倍,采用OpenCL/FPGA异构平台并行加速的协调速率是单一CPU平台的4倍以上。Objective Quantum key distribution(QKD)is the earliest practical technology in the field of quantum communication,which has absolute security in theory.There are two kinds of QKD systems according to their source encoding dimensions:continuous-variable QKD(CV-QKD)and discrete-variable QKD(DV-QKD).Compared with DV-QKD,CV-QKD systems have such advantages:1)modulation and decoding of CVs do not require special devices and can be implemented effectively by standard telecommunication networks;2)the detection efficiency of homodyne or heterodyne detector used by CV-QKD is higher than that of the single-photon detector used by DV-QKD at room temperatures.Shannon’s theorem suggests that the longer code length suffices for a more stable performance.Therefore,the CV-QKD system generally adopts great code length,and the number of optical pulses involved in data reconciliation reaches 10~5.However,such a long block length brings about a much high calculated quantity.This inevitably results in a low speed of data reconciliation,which restricts the throughput and the key rates of the CV-QKD system.Given this,the paper adopts hardware devices to accelerate the decoding process.Open computing language(OpenCL)can process data at high speed by means of parallel computation.FPGA is highly parallel and can achieve high performance with ultra-low power consumption.Therefore,the combination of OpenCL and FPGA for accelerated computing becomes a good solution.Methods To tackle the problem of low computing speed of data reconciliation in the current continuous variable quantum key distribution system,this paper proposes an eight-dimensional data reconciliation algorithm by adopting a highperformance FPGA board as the acceleration device on the OpenCL heterogeneous computing framework.According to the characteristics of FPGA,the algorithm is optimized as follows.1)The expression of for loops is optimized so that the OpenCL compiler can better understand the intention of the designer to generate a more effective FPGA hardware structure.

关 键 词：量子光学 量子密钥分发 多维数据协调 OPENCL FPGA LDPC码 

分 类 号：O431.2[机械工程—光学工程]