DSP+FPGA的EMIF通信系统设计与实现  

Design and Implementation of EMIF Communication System Based on DSP+FPGA

作　　者：魏同成 杜勇[1] 左杨 WEI Tong-cheng;DU Yong;ZUO Yang(Xinjiang Key Laboratory for Luminescence Minerals and Optical Functional Materials,School of Physics and Electronic Engineering,Xinjiang Normal University,Urumqi,Xinjiang,830054,China;School of Information and Communication,Guilin University of Electronic Science and Technology,Guilin,Guangxi,541004,China)

机构地区：[1]新疆师范大学物理与电子工程学院新疆发光矿物与光功能材料研究重点实验室,新疆乌鲁木齐830054 [2]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《新疆师范大学学报（自然科学版）》2023年第1期14-24,共11页Journal of Xinjiang Normal University(Natural Sciences Edition)

基　　金：广西自然科学基金(2018GXNSFAA294056)。

摘　　要：数字信号处理(Digital Signal Process,DSP)+可编程阵列逻辑(Field Program Gate Way,FPGA)正在广泛应用于复杂的数字信号处理领域。针对DSP与FPGA单个处理器性能有限、不够灵活等问题.提出DSP+FPGA架构的系统设计方案.基于TMS320C6748(DSP)和EP3C40Q240C8N(FPGA)芯片的外部存储器接口(External Memory Interface,EMIF)实现了DSP+FPGA的协同处理系统。该系统利用FPGA在底层算法的优势与DSP在复杂算法的优势,具有硬件结构灵活、通用性强等特点,相较于单个芯片提高了系统性能,经过测试该系统运行稳定,无误码时通信速率可达到20 MB/s.Digital Signal Process(DSP)+Field Program Gate Way(FPGA)is widely used in complex digital signal processing fields.Aiming at the problems of limited performance and inflexibility of DSP and FPGA single processor,a system design scheme of DSP+FPGA architecture is proposed.Based on the External Memory Interface(EMIF)of TMS320C6748(DSP)and EP3C40Q240C8N(FPGA)chips,a DSP+FPGA collaborative processing system is implemented.The system makes use of the advantages of FPGA in the underlying algorithm and DSP in the complex algorithm,it has flexible hardware structure,strong versatility,and improves the system performance compared with a single chip.After testing,the system runs stably,and the communication rate can reach 20MB/s without error.

关 键 词：EMIF DSP FPGA 高速通信 

分 类 号：TN914.3[电子电信—通信与信息系统]