一款7 Bit 250 Msps射频采样SAR ADC的设计  

Design of a 7 Bit 250 Msps RF⁃sampling SAR ADC

作　　者：孙金中 付秀兰 李冬 SUN Jinzhong;FU Xiulan;LI Dong(Anhui Siliepoch Technology Co.,Ltd.,Hefei 230031,China)

机构地区：[1]安徽芯纪元科技有限公司,安徽合肥230031

出　　处：《电子设计工程》2023年第7期179-183,共5页Electronic Design Engineering

摘　　要：针对软件无线电架构的导航接收机对模数转换器的高输入带宽、高速及低功耗的需求,通过集成低功耗宽带采样保持电路及新型非二进制权重的电容阵列数模转换器电路,采用逐次逼近型模数转换器架构,设计实现了一款射频直接采样SAR模数转换器。采用55 nm CMOS工艺电路设计、版图设计、仿真及硅流片验证,测试结果表明,该ADC实现了34 dB SNDR、36 dB SFDR和1.6 GHz的模拟输入信号带宽。该ADC的版图面积为670μm×390μm,功耗为9.6 mW。The high input bandwidth,high speed and low power consumption of ADC are required for navigation receiver based on software radio architecture.A RF direct sampling SAR ADC is designed and implemented by integrating the novel low power wideband sample and hold circuit and a no⁃binary weighted capacitance array DAC.The ADC has been designed and implemented using 55 nm CMOS process,layout design,simulation and silicon wafer verification,the ADC achieves 34 dB SNDR,36 dB SFDR and 1.6 GHz analog input signal bandwidth.The ADC area occupies 670μm×390μm and the power consumption is 9.6 mW.

关 键 词：逐次逼近 模数转换器 宽带 采样保持放大器 电容数模转换器 

分 类 号：TN433[电子电信—微电子学与固体电子学]