带有自动归零技术的两级逐次逼近模拟数字转换器  

A Two-Stage SAR ADC with A Modified Auto-Zero Technique

作　　者：胡毅 李振国 侯佳力 薛明艺 胡伟波 HU Yi;LI Zhenguo;HOU Jiali;XUE Mingyi;HU Weibo(Beijing Smart-Chip Microelectronics Technology Co.,Ltd.,Beijing 100192,China;College of Electronic Information and Optical Engineering,Nankai University,Tianjin 300071,China)

机构地区：[1]北京智芯微电子科技有限公司,北京100192 [2]南开大学电子信息与光学工程学院,天津300071

出　　处：《电子器件》2023年第1期22-28,共7页Chinese Journal of Electron Devices

基　　金：国家电网有限公司总部管理科技项目(5100-201941436A-0-0-00)。

摘　　要：提出和验证了一个两级高位模数转换器新架构。该架构用剩余电压放大器连接两级。与传统结构不同的是:此剩余电压放大器使用了改进的新型自动归零技术,并且在第二级中,两个单端数模转换器代替一个差分数模转换器。第一级采样量化时,剩余电压放大器短路,将自身噪声失配电压放大,并保存在其中一个单端数模转换器中。第一级量化完毕,放大器将剩余电压和其噪声失配电压一起放大并保存在另一个单端数模转换器中。第二级量化时,两个单端数模转换器上的失配电压及低频噪声会互相抵消。基于该技术,利用180 nm工艺,实现了500 kHz采样频率的16位数模转换器。在放大器输入等效噪声(rms)为89μV情况下,利用560μA电流,实现了93.7 dB的SNDR。A novel structure of two-stage high-resolution successive approximation register(SAR)ADC is proposed.A residual amplifier is useed to connect the two stages.Being different from the structures of traditional ADCs,in the proposed ADC,a modified auto-zero technique is adopted,and two single-ended DACs replace a differential DAC in the second stage.During the digitization time in the first stage,the shorted residue amplifier amplifies its own mismatch voltages and noises,and saves them in one single-ended DAC.After quantizing,the residual voltage,mismatch voltages and noises are amplified together and kept in the other single-ended DAC.During digitization in the second stage,the mismatch voltages and low frequency noises would be mutually cancelled.A two-stage 16 bit 500 kS/s SAR ADC is implemented adopting a 180 nm process,with a 3.3 V power supply to verify it.It uses 560μA current to achieve 93.7 dB SNDR in simulation when the integrated noise(rms)in the residual amplifier is 89μV.

关 键 词：模数转换器 逐次逼近型 自动归零技术 剩余电压放大器 伪差分数模转换器 

分 类 号：TN792[电子电信—电路与系统]