一种移相时钟驱动的低纹波四相位电荷泵设计  

A low ripple four-phase charge pump design driven by a phase-shift clock

作　　者：秦旺 徐俊 荆郁然 李波[1] QIN Wang;XU Jun;JING Yuran;LI Bo(Xidian University,Xi’an 710071,China;The 58th Institude,China Electronics Technology Group Corp.,Wuxi 214000,China)

机构地区：[1]西安电子科技大学,陕西西安710071 [2]中国电子科技集团公司第五十八研究所,江苏无锡214000

出　　处：《微电子学与计算机》2023年第5期84-89,共6页Microelectronics & Computer

基　　金：陕西省重点研发计划项目(2020GY-053)。

摘　　要：针对传统的四相时钟电荷泵纹波大的缺点,提出了一个通过移相时钟分时驱动的新型电荷泵结构.电荷泵主体采用两组互补并联结构的四相电荷泵,输出级采用交叉耦合结构,消除了最后一级阈值电压损失,此外在每级输出节点增加二极管连接的NMOS作为辅助管,增加预充电,缩短建立时间.该电荷泵系统不同于传统的单一时钟驱动电荷泵,采用移相时钟驱动多支路并联电荷泵,分时对输出节点进行充电,以降低负载电容充放电时间,降低输出电压纹波.基于SMIC 65 nm工艺的Cadence Spectre仿真结果表明,该电路输入电压为1.8 V,时钟为50 MHZ,输出目标电压10 V,负载电容50 pF,在400 uA的电流驱动能力下,输出电压纹波最大仅为2 mV.具有低纹波的优点.Aiming at the shortcomings of the traditional four-phase clock charge pump with large ripple,a new charge pump structure is proposed which is driven by phase-shifting clock ticking.The main body of the charge pump adopts two sets of complementary parallel structure of the four-phase charge pump,and the output stage adopts a cross-coupling structure,eliminating the last stage threshold voltage loss.In addition,the NMOS connected to the diode is added as an auxiliary tube at each stage output node,increasing precharge and shortening the establishment time.The charge pump system is different from the traditional single clock drive charge pump,using a phase shift clock to drive multiple branches in parallel charge pump,time-sharing charging of the output node to reduce the load capacitance charge and discharge time,reduce the output voltage ripple.The cadence Spectre simulation results based on the SMIC 65 nm process show that the input voltage of the circuit is 1.8 V,the clock is 50 MHZ,the output target voltage is 10 V,the load capacitance is 50 pF,and the output voltage ripple is only 2 mV at a current drive capability of 400 uA.It has the advantage of low ripple.

关 键 词：电荷泵 移相时钟 快速建立 低纹波 四相不交叠时钟 

分 类 号：TN433[电子电信—微电子学与固体电子学]