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作 者:张伟涛[1] 黄力 袁晓光[1] 任爱锋[1] 全英汇 Zhang Weitao;Huang Li;Yuan Xiaoguang;Ren Aifeng;Quan Yinghu(School of Electronic Engineering,Xidian University,Xi’an 710071,Shaanxi,China)
机构地区:[1]西安电子科技大学电子工程学院,陕西西安710071
出 处:《高校实验室科学技术》2023年第1期61-66,共6页
基 金:教育部产学合作协同育人项目(项目编号:202102278057)。
摘 要:在微机原理教学中,利用模型CPU比基于具体型号CPU开展教学具有指令集可灵活设置,通用性强等优势。RISC-V架构是一个年轻且精简高效的开放指令集架构,非常适合于微机原理教学,然而目前微机原理教学中缺乏与RISC-V架构的模型机配合使用的汇编语言程序设计集成开发环境,无法实现模型机的机器码生成与分析。本文提出了一种RISC-V模型机汇编器设计方案,实现了RISC-V汇编语言程序设计集成开发环境,它具有源程序输入、编辑、汇编、调试、仿真等功能,能够生成RISC-V模型机上可执行的机器码文件,帮助学生更好地理解CPU的功能与结构,掌握微机接口设计等课程内容,也有利于激发学生基于开源架构设计和实现模型CPU的创新意识。In the teaching process of microcomputer principles course,compared with specific CPU,a modeled CPU has the advantages of flexible instruction set and high generality.RISC-V is an open standard Instruction Set Architecture(ISA)enabling a new era of processor innovation through open collaboration,which is very suitable for the teaching of microcomputer principles course.However,there is a lack of an integrated development environment for assembly language programming with a model machine of the RISC-V architecture.This paper proposes a design scheme for RISC-V model machine assembler,and implements the RISC-V assembly language programming integrated development environment for teaching purpose.It enables the source program input,editing,assembly,debugging,and simulation,and can generate RISC-V machine code file which can be executed on the model machine.The proposed assembler can help students better understand structure and function of CPU,and better learn the microcomputer interface design method.Moreover,it motivates the students innovative awareness of designing and implementing model CPUs based on open ISA.
分 类 号:G642[文化科学—高等教育学]
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