提升精细线路蚀刻良率的方法探讨  

Discussion on methods to improve the etching quality of fine circuit

作　　者：李君红 LI Junhong(Shanghai Meiwei Technology Co.,Ltd.,Shanghai 201613,China)

机构地区：[1]上海美维科技有限公司,上海201613

出　　处：《印制电路信息》2023年第4期34-38,共5页Printed Circuit Information

摘　　要：针对以减成法制作的印制电路板(PCB)在精细线路中存在部分区域良率较差的情况,通过分析电镀铜厚、干膜显影、蚀刻线的均匀性对良率的影响,找出蚀刻后线宽分布与测试板的电镀铜厚度、显影后干膜宽度及蚀刻均匀性之间的关系。根据实测结果,对非均匀的线宽曝光补偿值进行修订优化。通过实验,在20μm铜厚下将25/25μm线路的局部开路/短路良率从40.91%提升到95.45%,整板的开路/短路良率从88.26%提升到93.94%。优化后较大提升了整板的线宽一致性。In view of the poor yield performance of the production plate in some areas of fine lines produced by the subtractive method,this paper analyzes the influence of the thickness of copper plating,dry film development and the uniformity of etched line on the yield,and finds out the relationship between the distribution of line width and the thickness of copper plating,the width of dry film after development and the uniformity of etched line.According to the measured results,the non-uniform line width exposure compensation value was revised and optimized.Finally,the local Open/Short yield of 25/25μm was increased from 40.91%to 95.45%at 20μm copper thickness.The Open/Short yield of the whole plate was increased from 88.26%to 93.94%.After optimization,the line width uniformity of the whole plate has been greatly improved.

关 键 词：减成法 良率 均匀性 蚀刻 细线 

分 类 号：TN41[电子电信—微电子学与固体电子学]