基于FPGA的高速数据采集存储系统设计与实现  

Design and Implementation of High Speed Data Acquisition and Storage System based on FPGA

作　　者：刘静[1] 陈家敏[1] Liu Jing;Chen Jiamin(Yunnan Vocational College of Mechanical andElectrical Technology,Kunming,China)

机构地区：[1]云南机电职业技术学院,云南昆明

出　　处：《科学技术创新》2023年第9期101-104,共4页Scientific and Technological Innovation

摘　　要：本文利用FPGA可编程逻辑器件的特点,设计并实现了基于FPGA的高速数据采集系统。本系统设计采用的FPGA是塞灵思公司的XC3SD3400A芯片。文中对整个硬件电路包括放大电路、AD转换电路、时钟电路、电源电路、存储电路以及外围电路等进行了设计,并利用Cadence Allegro SPB 16.2实现了电路原理图的制作和PCB板的制作。软件部分是利用FPGA硬件描述语言Verilog编程实现,使它作为控制器完成对信号的采集。This paper utilizes the characteristics of FPGA programmable logic devices to design and implement a high-speed data acquisition system based on FPGA.The FPGA used in the design of this system is the XC3SD3400A chip of Celine Company.In this paper,the entire hardware circuit,including amplification circuit,AD conversion circuit,clock circuit,power supply circuit,storage circuit,and peripheral circuit,is designed.The circuit schematic diagram and PCB board are produced using Cadence Allegro SPB 16.2.The software part is programmed using the FPGA hardware description language Verilog to complete the signal acquisition as a controller.

关 键 词：FPGA 电路设计 高速数据 采集系统 

分 类 号：TB34[一般工业技术—材料科学与工程]