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作 者:黄志鹏 马奎 张晶[1] HUANG Zhipeng;MA Kui;ZHANG Jing(College of Big Data and Information Engineering,Guizhou University,Guiyang 550025,China;Guizhou Provincial Key Laboratory for Micro-Nano-Electronics and Software,Guizhou University,Guiyang 550025,China)
机构地区:[1]贵州大学大数据与信息工程学院,贵阳550025 [2]贵州大学贵州省微纳电子与软件技术重点实验室,贵阳550025
出 处:《智能计算机与应用》2023年第4期167-173,共7页Intelligent Computer and Applications
摘 要:本文基于CMOS工艺设计了一种新型的轨到轨集成运算放大器。对比分析传统轨到轨输入级设计的优劣,该运放选择采用单差分对输入级结构,使用耗尽型NMOS管作为输入对管,利用耗尽型NMOS管的体效应以及对输入级电路结构的优化,实现轨到轨输入,以AB类输出级结构实现轨到轨输出。经过Cadence仿真验证,工作在5 V单电源供电下,共模输入电压范围可以实现满轨0~5 V,增益高达141.1 dB,带宽1.7 MHz,相位裕度55.4°,具有较低的输入失调电压264μV、输入偏置电流9 pA。整体电路实现了近乎满轨的轨到轨的输出电压摆幅,达到轨到轨运算放大器的设计要求。In this paper,a new rail-to-rail integrated operational amplifier is designed based on CMOS technology.The advantages and disadvantages of traditional rail-to-rail input stage design are compared and analyzed.The operational amplifier adopts single-difference pair input stage structure,uses exhausted NMOS tube as input pair tube,uses the volume effect of exhausted NMOS tube and optimizes the circuit structure of input stage to realize rail-to-rail input,thereafter uses AB class output stage structure to realize rail-to-rail output.Through Cadence simulation verification,working under 5 V single power supply,the common mode input voltage range can achieve full rail 0~5 V,gain up to 141.1dB,bandwidth 1.7 MHz,phase margin 55.4°,low input offset voltage 264μV,input bias current 9 pA.The whole circuit realizes the output voltage swing of nearly full rail and meets the design requirements of rail to rail operational amplifier.
分 类 号:TN432[电子电信—微电子学与固体电子学]
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