基于快速FIR算法的自适应滤波器的VLSI实现  

VLSI Implementation of Adaptive Filter Based on Fast FIR Algorithm

作　　者：刘明 丘聪 佳沐 LIU Ming;QIU Cong;JIA Mu(School of Microelectronics,Shenzhen Institute of Information Technology,Shenzhen 518172,China)

机构地区：[1]深圳信息职业技术学院微电子学院,广东深圳518172

出　　处：《河南科技》2023年第9期15-18,共4页Henan Science and Technology

基　　金：深圳市科技计划项目(JCYJ20180307123857045);深圳信息职业技术学院科技项目(SZIIT2019KJ026);深圳信息职业技术学院科技项目(LHPY-2021005)。

摘　　要：[目的]自适应滤波器能根据优化算法来自动调整传递函数,是一种强大的自适应系统,在信号处理、通信、雷达、声呐、地震学、导航系统和生物医学工程等领域有着广泛应用。随着集成电路工艺技术的发展,电路功耗显得尤为重要,可提升收敛特性和吞吐率。[方法]本研究提出一种基于快速FIR算法的3并行延时LMS自适应滤波器的架构,设计一种新颖的硬件高效架构,用于并行自适应3条支路的权重更新。与传统滤波器结构相比,并行滤波器具有更高的吞吐率和更低的功耗。为提高自适应数字滤波器的收敛特性,从三条权值更新支路中选择一个具有更好系统性能的分支。采用细粒度的算术运算单元和重定时技术,能有效降低关键路径的延时。[结果]从ASIC综合结果可知,与现有最佳结构相比,本研究所提出的3并行9抽头滤波器架构的功耗降低近16%,面积延时积(ADP)降低近11%。[结论]本研究所提出的架构设计具有重要的实践指导意义。[Purposes]Adaptive filter is a powerful adaptive system,which can automatically adjust the transfer function according to the optimization algorithm.It is widely used in signal processing,communication,radar,sonar,seismology,navigation system and biomedical engineering.With the development of integrated circuit technology,circuit power consumption is particularly important,which can improve the convergence characteristics and throughput.[Methods]This study proposes a three-parallel delay LMS adaptive filter architecture based on fast FIR algorithm.A novel hardware efficient architecture is designed to update the weights of three parallel adaptive branches.Compared with the traditional filter structure,the parallel filter has higher throughput and lower power consumption.In order to improve the convergence characteristics of the adaptive digital filter,a branch with better system performance is selected from three weight update branches.The fine-grained arithmetic operation unit and retiming technology can effectively reduce the delay of the critical path.[Findings]From the ASIC synthesis results,compared with the existing optimal structure,the power consumption of the proposed 3-parallel 9-tap filter architecture is reduced by nearly 16%,and the area delay product(ADP)is reduced by nearly 11%.[Conclusions]It can be seen that the architecture design proposed in this study has important practical guiding significance.

关 键 词：自适应滤波器 3并行DLMS 快速FIR算法 收敛特性 细粒度 专用集成电路 

分 类 号：TN492[电子电信—微电子学与固体电子学]