应用于Flash存储器的一种高效低纹波电荷泵设计  

An efficient low ripple charge pump design applied to Flash memory

作　　者：荆郁然 吴楚彬 秦旺 JING Yu-ran;WU Chu-bin;QIN Wang(Xidian University;The 58th Institude,China Electronics Technology Group Corp.)

机构地区：[1]西安电子科技大学 [2]中国电子科技集团公司第五十八研究所

出　　处：《中国集成电路》2023年第5期48-52,共5页China lntegrated Circuit

摘　　要：针对交叉耦合型电荷泵电荷回流的问题,本文提出了一种新型六相位电荷泵结构,电荷泵的主体由3个NMOS管和3个泵电容组成。考虑到时钟驱动能力对电荷泵性能的影响,设计通过增加额外的时钟驱动模块实现四相位到六相位的时钟转换,从而减小电荷泵的上升时间并改善输出电压。此外,电路采用并联双支路结构减小输出电容的充放电时间间隔,以减小输出纹波。基于0.13μm工艺的仿真结果表明,在时钟频率为20MHz,负载电容为50pF,负载电流为300μA的条件下,该电路可以实现3.3V到15V的电压转换,效率可达到67.7%,输出纹波仅为38.5mV。Aiming at the problem of charge reflow of cross-coupled charge pumps,a new six-phase charge pump structure is proposed,and the main body of the charge pump consists of three NMOSFET and three pump capacitors.Considering the impact of clock drive capability on charge pump performance,the design implements four-phase to six-phase clock conversion by adding additional clock driver blocks,thereby reducing the charge pump rise time and improving the output voltage.In addition,the circuit adopts a parallel two-branch structure to reduce the charge and discharge interval of the output capacitor to reduce the output ripple.The simulation results based on the 0.13μm process show that under the conditions of clock frequency of 20MHz,load capacitance of 50pF,and load current of 300μA,the circuit can achieve voltage conversion from 3.3V to 15V,with an efficiency of 67.7%and an output ripple of only 38.5mV.

关 键 词：电荷泵 低纹波 高效率 FLASH存储器 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]