基于LVDS总线的故障注入系统设计  

Design of Fault Injection System Based on LVDS Bus

作　　者：李光明[1] 曾永航 LI Guangming;ZENG Yonghang(School of Electrical and Control Engineering,Shaanxi University of Science and Technology,Xi’an Shaanxi 710000,China)

机构地区：[1]陕西科技大学电气与控制工程学院,陕西西安710000

出　　处：《电子器件》2023年第2期337-341,共5页Chinese Journal of Electron Devices

摘　　要：针对现有故障注入器的故障注入速度低,无法与高速微处理器的处理速度相匹配的问题,设计了一种基于LVDS总线的故障注入系统,该系统通过LVDS总线收发数据,FPGA为编解码芯片,在Linux系统中构建函数模型,通过对底层芯片的控制,搭建与LINUX系统中函数模型对应的故障模型,能够实现物理层、电气层和协议层的故障模拟和注入功能。最后,通过故障注入实验,得出本故障注入系统的故障注入速度可达到144 MHz左右,验证了该系统功能的实用性与先进性。Aiming at the problem that the fault injection speed of the existing fault injector is low and cannot match the processing speed of the high-speed microprocessor,a fault injection system is designed based on the LVDS bus,which transmits and receives data through the LVDS bus.FPGA is a codec chip,and a function model is built in the Linux system.Through the control of the underlying chip,a fault model corresponding to the function model in the LINUX system is built,which can realize the fault simulation and injection func-tions of the physical layer,electrical layer and protocol layer.Finally,through fault injection experiment,it is concluded that the fault in-jection speed of the fault injection system can reach about 144 MHz,which verifies the practicability and advancement of the function of the system.

关 键 词：LVDS FPGA LINUX 故障模型 物理层 电气层 协议层 

分 类 号：TN402[电子电信—微电子学与固体电子学]