非理想电网下基于双d-q变换的锁相环设计  

Design of Phase Locked Loop Based on Double d-q Transform in Non Ideal Grid

作　　者：来益博 韩荣杰 刘箭 刘洪德[2] LAI Yi-bo;HAN Rong-jie;LIU Jian;LIU Hong-de(State Grid Hangzhou Power Supply Company,Hangzhou 310009,China;不详)

机构地区：[1]国网杭州供电公司,浙江杭州310009 [2]南京南瑞继保电气有限公司,江苏南京211100

出　　处：《电力电子技术》2023年第4期80-83,共4页Power Electronics

摘　　要：针对传统的单同步坐标锁相环(SSRF-SPLL)在非理想电网条件下存在检测相位和幅值不准确的问题,此处提出多陷波器级联的双同步坐标系解耦软件锁相环(DDSRF-SPLL),通过多个陷波器级联环节滤除电网背景谐波,通过双同步坐标系解耦滤波环节提取电网正负序分量。该方案可以快速准确地输出电网电压的相位、频率和正负序分量。仿真和实验结果验证了所提锁相环(PLL)在电压理想工况、不平衡工况、基波非工频工况和电压有背景谐波工况的有效性。In view of the problems of inaccurate detection phase and amplitude of traditional single synchronous coordinate phase locked loop(SSRF-SPLL)under non ideal grid conditions,a dual synchronous coordinate system decoupling software phase locked loop(DDSRF-SPLL)with multiple notch filters is proposed.The negative sequence component of the power grid is filtered through the dual synchronous coordinate system decoupling filter,and the harmonics of the power grid are filtered through multiple notch filters.This scheme can quickly and accurately extract the voltage phase and voltage positive and negative sequence components.The simulation and experimental results verify the effectiveness of the proposed phase locked loop(PLL)under ideal voltage conditions,unbalanced conditions and nonpower frequency conditions.

关 键 词：锁相环 非理想电网 陷波器 正负序分量 

分 类 号：TN911.8[电子电信—通信与信息系统]