面向可重构AI芯片的编译框架设计  

Compilation Framework Design for Reconfigurable AI Chip

作　　者：于振华 王向前 吕亚飞 Yu Zhenhua;Wang Xiangqian;Lv Yafei(iFlytek,Co.,Ltd.,Hefei 230088,China;School of Internet,AnHui University)

机构地区：[1]科大讯飞股份有限公司,合肥230088 [2]安徽大学互联网学院

出　　处：《单片机与嵌入式系统应用》2023年第6期20-23,共4页Microcontrollers & Embedded Systems

摘　　要：针对LUNA体系结构的特征,设计了高效的类C语言的数据流编译框架NLANG,采用C+原语的静态图编程模式描述LUNA的计算逻辑,提出了外层原语—内层原语—低层原语的3层框架对静态图进行高效转换,分析当前计算特征,归纳出相应计算模式,根据计算模式自动生成匹配的硬件连接配置。性能评测结果表明,NLANG编译器生成的汇编代码效率能够达到手工汇编效率的90%以上。Aiming at the characteristics of the LUNA architecture,an efficient C like language data flow compilation framework NLANG is designed,and the static graph programming mode of C+primitives is used to describe the calculation logic of LUNA,and the outer-inner-lower three-layer layer framework primitives are proposed.The key technology mainly includes analyzing the characteristics of the current calculation and summarizing the corresponding calculation mode.According to the calculation mode,Aautomatically generating the matching hardware connection configuration.The performance evaluation results show that the efficiency of assembly code generated by NLANG compiler can reach more than 90%of manual assembly.

关 键 词：可重构 硬件连接 编译优化 AI芯片 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]