基于USB2.0总线的NAND Flash检测及控制方法  被引量:1

NAND Flash detection and control method based on USB2.0 bus

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作  者:申晓敏 钱礼华 杜剑英 党峰 刘保炜 Shen Xiaomin;Qian Lihua;Du Jianying;Dang Feng;Liu Baowei(China Ordnance Industry Test and Testing Institute,Huayin 714200,China)

机构地区:[1]中国兵器工业试验测试研究院,陕西华阴714200

出  处:《电子技术应用》2023年第6期44-48,共5页Application of Electronic Technique

基  金:国防技术基础项目(JSJT2020208A001)。

摘  要:在高速大容量存储装置设计中多采用NAND Flash存储器,针对目前采用串口检测坏块、实现数据读写的方法存在检测速度慢、等待时间长等缺点,提出了基于USB2.0总线的NAND Flash检测与控制方法。利用FPGA逻辑控制功能和高速USB接口芯片设计通信和控制电路,并通过上位机软件实现对Flash的命令、操作控制,由用户通过PC应用程序完成对NAND Flash的读写、擦除检测及坏块标定。经实验应用验证,该方法检测、读写速度快,使用灵活,能准确、有效实现数据的快速读写、擦除及坏块标定,可广泛应用于存储测试装置的设计研制中。At present,NAND Flash memory is mostly used in the design of high-speed and large-capacity storage device.Aiming at the shortcomings of serial port detection and data reading and writing methods,such as slow detection speed and long waiting time,a NAND Flash detection and control method based on USB2.0 bus was proposed.The communication and control circuit is de‐signed by using FPGA logic control function and high-speed USB interface chip,and the command and operation control of Flash is realized by PC software.The user can complete the reading and writing,erasing detection and bad block calibration of NAND Flash through PC application program.The experimental results show that the method is fast,flexible,accurate and effective in reading,writing,erasing and bad block calibration,and can be widely used in the design and development of storage test devices.

关 键 词:USB总线 FLASH存储器 FPGA 检测 

分 类 号:TP206[自动化与计算机技术—检测技术与自动化装置]

 

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