一种高速并行的MSK调制算法  

A High-speed Parallel MSK Modulation Algorithm

作　　者：魏刚冬 李浩坤 周良臣 WEI Gangdong;LI Haokun;ZHOU Liangchen(College of Electronic Engineering,Chengdu University of Information Technology,Chengdu 610225,China)

机构地区：[1]成都信息工程大学电子工程学院,四川成都610225

出　　处：《成都信息工程大学学报》2023年第4期398-403,共6页Journal of Chengdu University of Information Technology

摘　　要：MSK信号的相位连续与恒包络特性,使得传统MSK调制算法难以打破系统时钟频率限制,从而难以实现高速率、超宽带调制。针对该问题,提出一种高速并行的MSK调制算法,实现MSK并行调制,使得MSK调制实现时,在保留相位连续与恒包络特性的同时,比特速率不再受限于系统时钟频率。该算法包含了并行差分编码、变速率并行延迟和并行DDS等,不仅突破了系统时钟频率限制,还支持比特速率连续可调。Vivado环境中的Verilog HDL程序仿真验证了其有效性。For MSK modulation with phase continuity limitation,a high-speed parallel modulation algorithm is proposed,which realizes MSK parallel modulation,so that the bit rate of MSK is no longer limited to the system clock frequency when the modulation is implemented.The algorithm includes parallel differential coding,variable rate parallel delay,and parallel DDS,which not only breaks through the system clock frequency limit,but also supports continuously adjust-able bit rates.Simulations of the Verilog HDL program in the Vivado environment confirmed its effectiveness.

关 键 词：比特率 MSK调制 高速调制 并行信号调制 

分 类 号：TN761[电子电信—电路与系统]