一种43 GHz超高带宽线性驱动电路设计  

Design of a 43 GHz Ultra-High Bandwidth Linear Driver

作　　者：曾虹铭 唐昭焕 陈宏伟[2] 黄俊[1] 陈容 ZENG Hongming;TANG Zhaohuan;CHEN Hongwei;HUANG Jun;CHEN Rong(United Microelectronics Center Co.,Ltd.,Chongqing 401332,P.R.China;State Key Lab.of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,Chengdu 610054,P.R.China;National Laboratory of Science and Technology on Analog Integrated Circuit,Chongqing 400060,P.R.China)

机构地区：[1]联合微电子中心有限责任公司,重庆401332 [2]电子科技大学电子薄膜与集成器件国家重点实验室,成都610054 [3]模拟集成电路国家级重点实验室,重庆400060

出　　处：《微电子学》2023年第2期175-180,共6页Microelectronics

基　　金：模拟集成电路国家级重点实验室基金资助项目(JCKY2021210C006);重庆市自然科学基金资助项目(cstc2021jcyj-msxm3162)。

摘　　要：基于0.13μm SiGe BiCMOS工艺,设计了一种线性驱动电路。该电路具有高速和大摆幅的优势,能线性驱动行波马赫-曾德尔调制器(TW-MZM),可满足光通信系统100 Gbit/s单通道的应用需求。驱动电路包括连续时间线性均衡(CTLE)电路、可变增益放大(VGA)电路和基于Cascode结构改进优化的输出级电路,实现了增益可调,且避免发生由较大输出摆幅导致的晶体管击穿。仿真结果表明,电路的-3 dB带宽为43 GHz,其增益在15~25 dB内可调。在56 Gbaud NRZ/PAM4的输入信号下,测得的眼图形状良好,差分输出摆幅峰-峰值达4 V,电路整体功耗为1.02 W,面积为0.33 mm^(2)。Based on a 0.13μm SiGe BiCMOS process,a linear driver was designed.With the advantages of high speed and large swing,the driver supported to linearly drive Traveling-Wave Mach-Zehnder Modulator(TW-MZM)to meet the application requirements of 1oo Gbit/s single channel in optical communication systems.The driver included Continuous Time Linear Equalization(CTLE),Variable Gain Amplifier(VGA)and the output stage optimized based on cascode structure.It achieved adjustable gain and avoided transistor breakdown caused by large output swing.Simulation results show that the-3 dB bandwidth of the driver is 43 GHz,and its gain is adjustable from 15 dB to 25 dB.Under 56 Gbaud NRZ/PAM4 signal input,eye diagrams are measured well.The differential output swing pp value is up to 4 V,the total power consumption of the driver is 1.02 W,and the occupied area is 0.33mm^(2).

关 键 词：线性驱动电路 超高带宽 增益可调 大摆幅 

分 类 号：TN433[电子电信—微电子学与固体电子学]