应用于前端读出电路的片上LDO设计  

Design of an On-Chip LDO Used in Front-End Readout Circuits

作　　者：杨聚鑫 王佳 郑然 魏晓敏[4] 薛菲菲[4] 刘超[3,4] 胡永才 YANG Juxin;WANG Jia;ZHENG Ran;WEI Xiaomin;XUE Feifei;LIU Chao;HU Yongcai(School of Microelectronics,Northwestern Polytechnical University,Xi'an 710129,P.R.China;School of Electronics and Information,Northwestern Polytechnical University,Xi'an 710129,P.R.China;Taicang Yangtze River Delta Research Institute,Northwestern Polytechnical University,Taicang,Jiangsu 215400,P.R.China;School of Computer Science,Northwestern Polytechnical University,Xi'an 710129,P.R.China)

机构地区：[1]西北工业大学微电子学院,西安710129 [2]西北工业大学电子信息学院,西安710129 [3]西北工业大学太仓长三角研究院,江苏太仓215400 [4]西北工业大学计算机学院,西安710129

出　　处：《微电子学》2023年第2期233-240,共8页Microelectronics

基　　金：国家自然科学基金重点项目(11835008,11835007);国家自然科学基金青年项目(12105224);陕西省自然基金面上项目(2021JM-075,2021JQ-118);太仓市基础研究计划面上项目(TC2019JC05)。

摘　　要：为满足辐射探测器前端读出电路对模拟电路稳压器片上集成和快速瞬态时间响应的需求,设计了一种基于0.18μm CMOS工艺的全片上集成LDO。采用大摆幅高增益放大器驱动输出功率管,增大了功率管栅极调节电压摆幅,减小了功率管尺寸和LDO压差电压。该放大器同时增大了LDO的环路增益和对功率管栅极的充放电电流,从而改善了瞬态响应性能。为了不牺牲环路增益带宽和芯片面积,并且保证LDO在整个负载电流区间内保持稳定,提出了一种负载电流分区频率补偿方法。仿真结果表明,在负载电容为200 nF,负载电流范围为0~200 mA时,设计的LDO相位裕度均大于53°。在相同功率管尺寸情况下,采用大摆幅高增益放大器可以将LDO最大输出电流能力提高到两倍以上。当负载电流从10 mA跳变到200 mA时,LDO输出电压恢复时间小于6.5μs。设计的LDO电路面积为120μm×264μm,满载时电源效率为97.76%,最小压差电压为50 mV。In order to meet the design requirement of front-end readout circuit for radiation detectors,a fully onchip fast transient response LDO was designed in a O.18μm standard CMOS process.A large output swing high gain amplifier was utilized to drive the pass transistor,which could increase the gate voltage swing of the pass transistor.Thus,the dimension of the pass transistor and the dropout voltage were reduced.The loop-gain of LDO and the charge/discharge gate current of the pass transistor were increased,which is helpful for improving the transient response.In order to keep LDO stable under all load current conditions without sacrificing the loop-gain bandwidth and the die area,a frequency compensation method based on load current partition was proposed.The simulation results demonstrate that the phase margin is greater than 53°at the load capacitance of 200 nF and the load current ranging from O to 200 mA.With the help of large output swing and high gain amplifier,the maximum output current can be increased by two times when the dimension of pass transistor is the same.The settling time is smaller than 6.5μs when the load current suddenly increases from 10 mA to 200 mA.The die area of the proposed LDO is 120μm×264μm.The power efficiency at full load is 97.76%and the minimum dropout voltage is 50 mV.

关 键 词：低压差线性稳压器 快速瞬态响应 小面积 全片上集成 

分 类 号：TN432[电子电信—微电子学与固体电子学]