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作 者:岳旭龙 唐威 YUE Xulong;TANG Wei(School of Electronic Engineering,Xi'an University of Post and Telecommunications,Xi'an 710121,China)
机构地区:[1]西安邮电大学电子工程学院,陕西西安710121
出 处:《电子元件与材料》2023年第6期722-728,735,共8页Electronic Components And Materials
摘 要:为满足SerDes(SERializer/DESerializer)接收端相位插值型时钟数据恢复电路(CDR)对正交多相时钟的要求,采用22 nm CMOS工艺,设计了一种具有宽频率调谐范围,可产生12相时钟的前馈型环形压控振荡器(VCO)。电路包括频率调节电路和前馈型VCO电路两个部分。频率调节电路采用粗细调结构增大了振荡器调谐范围,实现了频率的精确调节;前馈型VCO通过辅助前馈通路形成5级环形振荡器,提高了振荡频率,产生的12相正交时钟也提高了插值线性度。仿真验证结果表明:所设计的VCO输出频率范围为2.21~11.23 GHz,8 GHz频率下振荡器的相位噪声为-93.1 dBc/Hz@1 MHz,-114.05 dBc/Hz@10MHz,功耗为5.18 mW。To satisfy the requirement of serializer/deserializer(SerDes)receiver phase interpolation clock and data recovery circuit(CDR)for the quadrature multiphase clock,a feed-forward ring voltage-controlled oscillator(VCO)was designed with wide frequency tuning range and capability of generating a 12-phase clock using 22 nm CMOS process.The circuit had two parts,namely,the frequency regulation circuit and the feed-forward VCO circuit.The frequency regulation circuit adopted both coarse and fine tuning structure to increase the tuning range of the oscillator and realize precise adjustment of the frequency.The feed-forward VCO formed a 5-stage ring oscillator through the auxiliary feed-forward path,which increased the oscillation frequency and improved the interpolation linearity of the 12-phase quadrature clock generator.The simulation results show that the designed VCO output frequency range is 2.21-11.23 GHz.The phase noise is-93.1 dBc/Hz@1 MHz,-114.05 dBc/Hz@10 MHz at 8 GHz.The power consumption is 5.18 mW.
关 键 词:前馈型 VCO 正交多相 频率调谐范围 相位噪声
分 类 号:TN753.5[电子电信—电路与系统]
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