强电磁干扰下射频集成微系统防护的挑战与机遇  

Challenges and Opportunities of RF Integrated Circuit Protection Under Strong Electromagnetic Interference

作　　者：徐魁文[1] 苏江涛 赵文生[1] 李文钧[1] 孙玲玲[1] Xu Kuiwen;Su Jiangtao;Zhao Wensheng;Li Wenjun;Sun Lingling

机构地区：[1]杭州电子科技大学

出　　处：《安全与电磁兼容》2023年第4期9-17,共9页Safety & EMC

基　　金：国家自然科学基金(62293493、61971174)。

摘　　要：强电磁脉冲注入到射频集成芯片/微系统中将产生一系列连锁响应,影响系统、器件以及芯片工作状态甚至引起击穿等可靠性问题,严重威胁器件、电路及系统安全。传统的电磁脉冲防护依赖于前后门的系统级别防护,将电磁防护设计与风险控制机制引入早期设计阶段至关重要。集成电路芯片是国家重大基础设施的核心部件,射频集成微系统的抗电磁脉冲攻击能力对系统安全有着举足轻重的作用。该文介绍了强电磁干扰下集成电路防护的挑战,从强电磁脉冲损毁机理、能力评估与测试技术、防护技术等方面介绍了该领域国内外的研究动态,分析了当前研究存在的主要问题和机遇,旨在为芯片级的电磁安全防护提供参考。High-power electromagnetic pulses injected into radio frequency(RF)integrated chips/microsystems would produce a series of chain reactions,affecting the working status of the system,devices and chips,and even causing reliability problems such as breakdown,which seriously threatens the safety of devices,circuits and systems.Traditional electromagnetic pulse protection relies on the system-level protection of the front and rear doors.It is very important to introduce electromagnetic protection design and risk control mechanism into the early design stage.Integrated circuit chips are the core components of major national infrastructures,and the anti-electromagnetic pulse attack capability of RF integrated microsystems plays a significant role in system security.This paper introduces the challenges of integrated circuits protection under high-power electromagnetic pulses,and introduces the domestic and foreign research trends in this field from the aspects of strong electromagnetic pulse damage mechanism,capability evaluation and testing technology,and protection technology.The main challenges and opportunities of current research are analyzed,aiming to provide reference for chip-level electromagnetic security protection.

关 键 词：强电磁脉冲 射频集成电路 损毁机理 电磁防护 

分 类 号：O441[理学—电磁学] TN78[理学—物理]