利用抖动信号提升ADC采集电路性能的设计与实现  

Design and Implementation of Improving ADC Acquisition Circuit Performance Using Jitter Signal

作　　者：隋尚兼 SUI Shangjian(Ceyear Technoligies Co.,Ltd.,Shandong 266000,China.)

机构地区：[1]中电科思仪科技股份有限公司,山东266000

出　　处：《电子技术（上海）》2023年第6期16-18,共3页Electronic Technology

摘　　要：阐述信号采集电路中因ADC器件量化精度误差带来动态性能恶化的问题,提出一种利用抖动信号提升ADC器件动态性能的电路设计方法。探讨抖动信号发生电路的设计原理,对ADC采样性能的优化效果,提出一种ADC采集电路的设计和实现方法,同时与未进行优化的电路设计效果进行对比,给出无杂散动态范围和刻度保真度的提升数据。This paper describes a circuit design method that utilizes jitter signals to improve the dynamic performance of ADC devices,in response to the problem of degradation in dynamic performance caused by quantization accuracy errors of ADC devices in signal acquisition circuits.It analyzes the design principle of the jitter signal generation circuit and the optimization effect on ADC sampling performance,proposes a design and implementation method of ADC acquisition circuit,and compares the effect with the circuit design that has not been optimized,providing data on improving the spurious dynamic range and scale fidelity.

关 键 词：电路设计 ADC 动态性能 量化误差 DITHER 

分 类 号：TN402[电子电信—微电子学与固体电子学]