改进型纠检错校验算法在星载计算机上的应用  

Application of improved error detection and correction algorithm on on⁃board computer

作　　者：甄凡凡 徐雪莲[1] ZHEN Fanfan;XU Xuelian(The 32nd Research Institute of China Electronics Technology Group Corporation,Shanghai 200233,China)

机构地区：[1]中国电子科技集团公司第三十二研究所,上海200233

出　　处：《现代电子技术》2023年第16期22-28,共7页Modern Electronics Technique

基　　金：某预研项目:嵌入式计算机高可靠技术。

摘　　要：纠检错算法是星载计算机抗单粒子翻转事件的有效策略。随着FPGA在航天领域的广泛应用,纠检错算法已成为实现纠检错功能的最佳硬件手段。针对单粒子多位翻转事件的发生,文中提出一种纠检错能力更强、耗时更短且具备数据回写功能的改进型纠检错算法。该算法采用一种(48,32,6)的线性循环缩短码,通过16位校验位对32位数据位进行纠二检三校验。在星载嵌入式高可靠计算机上进行算法验证,实验结果表明,所提算法能够成功实现纠二检三和数据回写的功能,且耗时仅需两个时钟周期。该算法满足实时性系统的要求,可以有效防护单粒子翻转事件,提高星载计算机的可靠性。EDAC(error detection and correction)is an effective strategy for anti-SEU(single event upset)events on on-board computer.With the widely used of FPGA in the aerospace field,EDAC has become the best hardware means to realize EDAC function.In allusion to MBU(multi-bits event upset),an improved EDAC algorithm with stronger error correction ability,shorter time consumption,and data writing-back function is proposed.In the algorithm,a(48,32,6)linear cyclic shortened codes is applied,and double-errors correction and triple-errors detection for 32 data bits are conducted by means of 16 check bits.The algorithm is verified on the on-board embedded highly reliable computer.The experimental results show that the proposed algorithm can realize double-errors correction and triple-errors detection and data writing-back successfully,and it only takes two clock cycles.The algorithm can meet the requirements of real-time system,can effectively prevent SEU events,and improve the reliability of on-board computers.

关 键 词：纠检错算法 星载计算机 单粒子翻转事件 现场可编程门阵列 编解码算法 纠二检三 数据回写 

分 类 号：TN47-34[电子电信—微电子学与固体电子学]