基于高速SerDes接口芯片的ATE测试板设计  

Design of ATE Test Board Based on High-speed SerDes Interface Chip

作　　者：王志立 王一伟 刘宏琨 WANG Zhili;WANG Yiwei;LIU Hongkun(Wuxi CMC Electromics Co.,Ltd.,Wuxi 214035,China)

机构地区：[1]无锡中微腾芯电子有限公司,江苏无锡214035

出　　处：《电子质量》2023年第7期29-34,共6页Electronics Quality

摘　　要：随着通信技术的飞速发展,高速串行互连以其结构简单、不需要传输同步时钟和相比并行传输具有更高数据传输效率等优点而成为了现代通信和数据传输的重要组成部分。随着对数据传输速率要求的不断提高,串化器/解串器(SerDes)接口应运而生。作为高速串行通信的重要组成部分,对其芯片的研究和设计一直是一个热点。主要从基本原理和测试需求2个方面入手,研究分析了高速SerDes接口芯片的测试方案和ATE测试板设计方法。介绍了高速SerDes接口芯片的基本工作原理、回环功能测试和关键测试参数。并从叠层结构、走线规则和板材选取3个方向阐述了ATE测试板的设计方法。With the rapid development of cummunication technology,high-speed serial interconnection has become a significant component of modern commuication and data transfer for its advantages of simple structure,independent of synchronous clock and higher efficiency than parellel transmission.SerDes rises in response of the increasing demand of high speed data transfer.SerDes is a significant part of high-speed serial communication,so the research and design of its chip is always a hot topic.Starting from the basic principles and test requirements,the test scheme of high-speed SerDes interface chip and design method of ATE test board are studied and analyzed.The basic working principle,loopback function test and key test parameters of high speed SerDes interface chip are introduced.And the design method of ATE test board is described from three directions of laminated structure,routing rules and plate selection.

关 键 词：高速SerDes接口芯片 回环功能测试 自动测试设备测试板 印制电路板板材 

分 类 号：TN407[电子电信—微电子学与固体电子学]