高效能多核处理器芯片功耗测试及其DVFS调度算法研究  

Research on Power Test and DVFS Scheduling Algorithm of High Performance Multi Core Processor Chip

作　　者：陈道品 武利会 罗春风 范伟成 何子兰 CHEN Dao-pin;WU Li-hui;LUO Chun-feng;FAN Wei-cheng;HE Zi-lan(Guangdong Power Grid Co.,Ltd.Foshan Power Supply Bureau,Foshan 528000 China)

机构地区：[1]广东电网有限责任公司佛山供电局,广东佛山528000

出　　处：《自动化技术与应用》2023年第8期149-152,160,共5页Techniques of Automation and Applications

基　　金：广东电网有限责任公司科技项目资助(GDKJXM20185496)。

摘　　要：针对处理器纳米级工艺快速发展,使高效能多核处理器芯片上集成晶体管,进而导致高效能多核处理芯片功耗大幅增加的问题,研究设计了一种双阈值功耗自适应的DVFS调度算法。该算法采用两级阈值调节配合功耗自适应实现了对高效能多核处理器的功耗优化,相较于传统的单阈值调节方式,该算法调节CPU的方式更科学有效。在大部分测试程序中,该算法的性能可保持在90%以上,最大功耗优化比例可达到35%以上。With the rapid development of nano scale processor technology,transistors are integrated into high-efficiency multi-core processor chips,which leads to a significant increase in power consumption of high-efficiency multi-core processor chips.A dual threshold power adaptive dvfs scheduling algorithm is studied and designed.Compared with the traditional algorithm,this algorithm can adjust the maximum power consumption to more than 35%of the traditional CPU,and can achieve more efficient performance.

关 键 词：DVFS算法 节能调度 功耗测试 高效能多核处理器 

分 类 号：TN402[电子电信—微电子学与固体电子学]