一种SoC程序加载与更新控制器的设计及FPGA实现  

Research and implementation of SoC program bootstrap loading and updating technology

作　　者：邹小航 宋树祥[1] 蔡超波 岑明灿 Zou Xiaohang;Song Shuxiang;Cai Chaobo;Cen Mingcan(School of Electronic and Engineering/School of Integrated Circuits,Guangxi Normal University,Guilin 541004,China)

机构地区：[1]广西师范大学电子与信息工程学院/集成电路学院,桂林541004

出　　处：《国外电子测量技术》2023年第6期70-78,共9页Foreign Electronic Measurement Technology

基　　金：广西创新驱动发展专项(AA19254001);国家自然科学基金(62061005);广西自然科学基金(2022GXNSFBA035646)项目资助。

摘　　要：在片上系统(system on chip,SoC)设计的过程中,为了减少芯片面积和知识产权核授权成本且不降低芯片性能,一般仅在芯片内部放置静态随机存取存储器(static random-access memory,SRAM)对用户程序进行存储和修改,这样SoC就需要一种或多种合适的程序加载和更新方式。为解决现有方案存在的程序加载方式复杂、可选的存储器件单一、通用性低等问题,研究并设计了SoC程序加载与更新的硬件控制器模块。该模块最多支持3种非易失性存储器共6种存储器选择方案在上电时自举加载程序至SRAM并启动SoC、程序在线或者离线(带EXFAT文件系统)更新。最后设计基于ARM CM3内核的SoC对该模块在现场可编程门阵列(field programmable gate array,FPGA)平台进行验证,结果表明,该模块在50 MHz时钟下处理16 Kbyte程序,最快11.5 ms完成SoC自举加载启动、20.5 ms完成程序在线更新和启动、300 ms完成离线更新并启动。该模块仅与SoC内核复位相连且不与下载器通信,可嵌入其他SoC内核并根据成本自由选择存储器和下载器,在设计各种低成本高速SoC的应用中具有重要工程意义。In the process of system on chip(SoC)design,in order to reduce chip area and intellectual property authorization cost without reducing chip performance,static random-access memory is generally only placed inside the chip.SRAM stores and modifies user programs so that the SoC requires one or more suitable ways to load and update programs.In order to solve the problems of complicated program loading mode,single optional memory device and low generality,a hardware controller module for SoC program loading and updating is researched and designed.The module supports up to three types of non-volatile memory and a total of six memory options.Bootstrap load programs to SRAM and start SoC,program online or offline(with EXFAT file system)updates at power-on.Finally,the SoC based on ARM CM3 kernel is designed to verify the module on the field programmable gate array(FPGA)platform.The results show that the module can process 16 Kbyte programs under the 50 MHz clock.The SoC bootstrap load can be started in 11.5 milliseconds,the program can be updated and started online in 20.5 milliseconds,and the program can be updated and started offline in 300 milliseconds.The module is only connected with the SoC kernel reset and does not communicate with the downloader.It can be embedded in other SoC cores and freely choose the memory and downloader according to the cost.It has important engineering significance in the design of various low-cost and high-speed SoC applications.

关 键 词：FPGA SOC设计 自举加载 程序在线/离线更新 通用性 EXFAT文件系统 

分 类 号：TN495[电子电信—微电子学与固体电子学]