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作 者:杜军 金慧慧 DU Jun;JIN Huihui(Beijing Academy of Quantum Information Sciences,Department of Quantum Engineering,Beijing 100193)
机构地区:[1]北京量子信息科学研究院,量子工程研究部,北京100193
出 处:《低温物理学报》2023年第2期114-121,共8页Low Temperature Physical Letters
摘 要:片上集成电容是超导量子芯片上的核心器件,其数值一般在百飞法(fF)至皮法(pF)范围.采用常规微纳加工技术在蓝宝石基片上制备了铌-氧化硅-铝(Nb/SiO_(2)/Al)平行板电容.利用刻蚀工艺制备了平行板电容器的下极板Nb,利用剥离工艺制备平行板电容器的上极板Al和介电层SiO_(2).室温下利用锁相放大原理和桥式电路原理测定电容大小,两种方法测定电容值基本一致,表明锁相放大原理测试pF级电容的可靠性.利用该电容与铝基约瑟夫森结组成谐振器,制备了中心频率位于4.35 GHz的约瑟夫森参量放大器.在稀释制冷机中10 mK温度下测定直流偏置谐振器的磁通-频率相位图,拟合数据获得的电容值与室温测定电容值接近,表明在mK、GHz条件下工作的片上集成电容可在室温、kHz条件下测定其数值大小.The on-chip Niobium-silicon oxide-aluminum(Nb/SiO_(2)/Al)parallel plate capacitors were fabricated by conventional micro/nano processing techniques on sapphire substrate.The lower plate(Nb)of the capacitor was prepared by etching process,the upper plate(Al)and dielectric layer(SiO_(2))were prepared by lift-off process.The capacitor value was measured at room temperature using phase-locked amplification method and balanced bridge-circuit method,with emphasis on the principle of the former.The results showed that the two methods acquired almost equal capacitor value,indicating the reliability of phase-locked amplification principle for testing pF level capacitors.A Josephson parametric amplifier(JPA)with a central frequency of 4.35 GHz was fabricated.The magnetic flux vs frequency phase diagram of the resonator under DC bias was measured at 10 mK temperature.The capacitance value obtained by fitting the data is close to the capacitance value measured at room temperature,indicating that the on-chip lumped capacitance under mK and GHz conditions can be measured at room temperature and kHz with certain accuracy.
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