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作 者:杨朝辉 李文 马奎 杨发顺[1,2,3] YANG Chaohui;LI Wen;MA Kui;YANG Fashun(College of Big Data and Information Engineering,Guizhou University,Guiyang 550025,China;Engineering Research Center of Semiconductor Power Device Reliability,the Ministry of Education,Guizhou University,Guiyang 550025,China;Key Laboratory of Micro-Nano-Electronics and Software Technology of Guizhou Province,Guizhou University,Guiyang 550025,China)
机构地区:[1]贵州大学大数据与信息工程学院,贵阳550025 [2]贵州大学半导体功率器件可靠性教育部工程研究中心,贵阳550025 [3]贵州大学贵州省微纳电子与软件技术重点实验室,贵阳550025
出 处:《智能计算机与应用》2023年第7期98-104,共7页Intelligent Computer and Applications
基 金:贵州大学引进人才项目(贵大人基合字(2019)63号);黔科合支撑[2023]一般283。
摘 要:设计了一种双通道、零漂移、高精密的轨对轨运算放大器,该运算放大器结合了自动调零技术与乒乓架构,对信号进行连续处理的同时也避免了互调失真的产生。整体电路结构主要包括:主运算放大器、调零运算放大器、频率补偿电路、开关电路、振荡器、非交叠时钟电路以及基准电路。其中,基准电路、振荡器,非交叠时钟电路为共用模块,其余部分在双通道中独立工作。基于Cadence软件,采用国内0.6μm BCD工艺进行仿真设计,结果表明,在5 V的电源电压条件下,实现的性能指标为:输入失调电压<3.6μV,失调电压漂移<0.007μV/℃,开环增益>125 dB,共模抑制比>135 dB,电源抑制比>117 dB,增益带宽积>1.46 MHz,同时能够实现轨对轨输入输出。A dual-channel,zero-drift,high-precision rail-to-rail operational amplifier is designed,which combines auto-zero technology with ping-pong architecture to continuously process signals while avoiding intermodulation distortion.The overall circuit structure mainly includes:main operational amplifier,zero-switching operational amplifier,frequency compensation circuit,switching circuit,oscillator,non-overlapping clock circuit and reference circuit.In the structure research,the reference circuit,oscillator,and non-overlapping clock circuit are common modules,and the rest work independently in dual channels.Based on Cadence software,the domestic 0.6μm BCD process is used for simulation design,and the results show that under the condition of 5 V supply voltage,the achieved performance indicators are:input offset voltage<3.6μV,offset voltage drift<0.007μV/℃,open-loop gain>125 dB,common-mode rejection ratio>135 dB,power supply rejection ratio>117 dB,gain bandwidth product>1.46 MHz,and rail-to-rail input and output can be realized.
分 类 号:TN433[电子电信—微电子学与固体电子学]
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