基于FPGA的多功能FIR数字滤波器设计  

Design of multifunctional FIR digital filter based on FPGA

作　　者：王媛 金磊 曾富华[1] WANG Yuan;JIN Lei;ZENG Fuhua(Southwest China Institute of Electronic Technology,Chengdu 610036,China)

机构地区：[1]中国西南电子技术研究所,四川成都610036

出　　处：《现代电子技术》2023年第18期38-42,共5页Modern Electronics Technique

摘　　要：现代测控通信系统为航天器传输的测控信号模式多样、特性复杂。针对传统数字滤波器无法满足滤波特性多变的问题,设计一种基于FPGA的多功能FIR数字滤波器。根据任务需求选择满足性能指标的窗函数、频率响应特性、滤波带宽等控制命令,调用ROM表中对应的滤波参数,满足多功能滤波需求,采用对称型滤波结构节省FPGA硬件资源,利用乒乓缓存的操作满足信号滤波实时性,通过Verilog HDL语言实现多功能FIR数字滤波器。ModelSim设计仿真和实际FPGA工程试验结果表明,多功能FIR数字滤波器参数可选多变,能适应不同滤波需求信号的多种场景,灵活性强、实时性好、稳定性好、实用性高。Modern measurement and control communication systems transmit measurement and control signals to spacecraft with diverse modes and complex characteristics.In allusion to the problem that traditional digital filters cannot meet the variable filtering characteristics,a multifunctional finite impulse response(FIR)digital filter based on field programmable gate array(FPGA)is designed.The control commands that meet performance indicators such as window functions,frequency response characteristics,and filtering bandwidth are selected according to task requirements,and the multifunctional filtering requirements are satisfied by calling the corresponding filter coefficients in the read-only memory(ROM)table.The FPGA hardware resources are saved by adopting the symmetrical filter structure,the Ping-Pong cache operations is used to achieve real-time signal filtering,and the multifunctional FIR digital filter is realized by means of Verilog hardware description language(HDL).The Modelsim simulation and practical FPGA engineering test results show that the multifunctional FIR digital filter is optional and adjustable,which can adapt to a variety of scenes with different filtering demand signals,and has strong flexibility,good realtime performance,good stability and strong practicability.

关 键 词：FIR数字滤波器 多功能滤波器 FPGA 窗函数 频率响应特性 对称结构 Verilog HDL 

分 类 号：TN713.7-34[电子电信—电路与系统]