机构地区:[1]西安电子科技大学,西安710000 [2]北京轩宇空间科技有限公司,北京100190
出 处:《电子与信息学报》2023年第9期3253-3262,共10页Journal of Electronics & Information Technology
基 金:国家部委计划(2019-XXXX-ZD-101-00)。
摘 要:集成电路(IC)供应链的全球化已经将大多数设计、制造和测试过程从单一的可信实体转移到世界各处各种不可信的第三方实体。使用不可信的第三方知识产权(3PIP)可能面临着设计被对手植入硬件特洛伊木马(HTs)的巨大风险。这些硬件木马可能会使原有设计出现性能降低、信息泄露甚至发生物理层面不可逆的破坏,严重危害消费者的隐私、安全和公司的信誉。现有文献中提出的多种硬件木马检测方法,具有以下缺陷:对黄金参考电路的依赖、测试向量覆盖率的要求甚至是手动代码审查的需要,同时随着集成电路规模的增大,低触发率的硬件木马更加难以被检测。因此针对上述问题,该文提出一种基于图神经网络硬件木马的检测方法,在无需黄金参考电路以及逻辑测试的情况下实现了对门级硬件木马的检测。该方法利用图采样聚合算法(GraphSAGE)学习门级网表中的高维图特征以及相应节点特征,并采用有监督学习进行检测模型的训练。该方法探索了不同聚合方式以及数据平衡方法下的模型的检测能力。该模型在信任库(Trust-Hub)中基于新思90 nm通用库(SAED)的基准训练集的评估下,实现了92.9%的平均召回率以及86.2%的平均F1分数(平均聚合,权重平衡),相比目前最先进的学习模型F1分数提高了8.4%。而应用于基于系统250 nm库(LEDA)的数据量更大的数据集时,分别在组合逻辑类型硬件木马检测中获得平均83.6%的召回率、70.8%的F1,在时序逻辑类型硬件木马检测工作中获得平均95.0%的召回率以及92.8%的F1分数。The globalization of the Integrated Circuit(IC)supply chain has shifted most design,manufacturing,and testing processes from a single trusted entity to a variety of untrusted third-party entities in various parts of the world.The use of untrusted Third-Party Intellectual Property(3PIP)can expose a design to significant risk of having Hardware Trojans(HTs)implanted by adversaries.These hardware trojans may cause degradation of the original design,information leakage,or even irreversible damage at the physical level,seriously jeopardizing consumer privacy,security,and company reputation.Various hardware trojan detection approaches proposed in the existing literature have the following drawbacks:the reliance on golden reference model,the requirement for test vector coverage and even the need for manual code review.At the same time,with the increase of the scale of integrated circuits,the hardware trojans with low trigger rate are more difficult to be detected.Therefore,to address the above problems,a graph neural network-based HT detection method is proposed that enables the detection of gate-level hardware trojans without the need for golden reference model as well as logic tests.Graph Sample and AGgrEgate(GraphSAGE)is used to learn the high-dimensional graph features in the gate-level netlist and the attributed node features.Then supervised learning is employed for the training of the detection model.The detection capability of models with different aggregation methods and data balancing methods are explored.An average recall of 92.9%and an average F1 score of 86.2%under the evaluation of the Synopsys 90 nm generic library(SAED)based benchmark in Trust-Hub are achieved by the model,which is an 8.4%improvement in F1 score compared to state of the art.When applied to the dataset with larger data volume based on 250 nm generic library(LEDA),the average recall and F1 of combined logic type are 83.6%and 70.8%respectively,and the average recall and F1 score of timing logic type are 95.0%and 92.8%respectively.
分 类 号:TN406[电子电信—微电子学与固体电子学]
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