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作 者:HE Shiyang LI Hui LI Qingwen LI Fenghua
机构地区:[1]Xidian University,Xi’an 710126,China [2]Chinese Academy of Sciences,Beijing 100093,China
出 处:《Chinese Journal of Electronics》2023年第6期1355-1366,共12页电子学报(英文版)
基 金:supported by the National Key R&D Program of China(2022YFB3103400);the National Natural Science Foundation of China(61732022);the Province Key R&D Program of Shaanxi(2019 ZDLGY12-09);the Mobile Internet Security Innovation Team of Shaanxi Province(2018TD-007);the China 111 Project(B16037).
摘 要:The elliptic curve scalar multiplication(ECSM)is the core of elliptic curve cryptography(ECC),which directly determines the performance of ECC.In this paper,a novel time-area-efficient and compact design of a 256-bit ECSM processor over GF(p)for the resourceconstrained device is proposed,where p can be selected flexibly according to the application scenario.A compact and efficient 256-bit modular adder/subtractor and an improved 256-bit Montgomery multiplier are designed.We select Jacobian coordinates for point doubling and mixed Jacobian-affine coordinates for point addition.We have improved the binary expansion algorithm to reduce 75%of the point addition operations.The clock consumption of each module in this architecture is constant,which can effectively resist side-channel attacks.Reuse technology is adopted in this paper to make the overall architecture more compact and efficient.The design architecture is implemented on Xilinx Kintex-7(XC7K325T-2FFG900I),consuming 1439 slices,2 DSPs,and 2 BRAMs.It takes about 7.9 ms at the frequency of 222.2 MHz and 1763k clock cycles to complete once 256-bit ECSM operation over GF(p).
关 键 词:Elliptic curve encryption Finite field Montgomery multiplication Field programmable gate array Side-channel attacks
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