车规级LIN总线中55V摆率增强型LDO  

55 V Slew Rate Enhanced LDO in Automotive Grade LIN Bus

作　　者：孙力 王志亮[1] 崔子豪 章一鸣 陈靖 Sun Li;Wang Zhiliang;Cui Zihao;Zhang Yiming;Chen Jing(School of Information Science and Technology,Nantong University,Nantong 226000,China)

机构地区：[1]南通大学信息科学技术学院,江苏南通226000

出　　处：《半导体技术》2023年第9期776-786,共11页Semiconductor Technology

基　　金：江苏省科技成果转化专项资金项目(BA2022001);江苏省高等学校自然科学研究重大项目(22KJA510005)。

摘　　要：针对传统车载芯片中高压型低压差线性稳压器(LDO)的负载电流小、电源抑制比低、瞬态响应差等问题,提出了一种增强型高压LDO,通过一种新型高压预调制电路,提高了高压LDO的电源抑制比;通过一种新型摆率增强电路,改善了高压LDO的瞬态响应。电路基于BCD-120 V CMOS工艺完成建模,仿真结果显示,电压可调范围为5.5~55 V,输出5 V;负载电流为800 mA;低频电源抑制比为96 dB;1μs内负载电流从1 mA跳变到800 mA时,输出端最大上冲电压为26.6 mV,响应时间为8μs;下冲电压为45.4 mV,响应时间为7μs,满足车规级局域互联网(LIN)总线中高压LDO的性能要求。To solve the problems of high voltage low dropout regulators(LDOs) in conventional on-board chips,such as low load current,low power rejection ratio,and poor transient response,an enhanced high voltage LDO was proposed.The power rejection ratio of the high voltage LDO was improved by a novel high voltage pre-modulation circuit.The transient response of the high voltage LDO was improved by a novel slew rate enhancement circuit.The circuit was modeled based on BCD-120 V CMOS technology.The simulation results show that the voltage-adjustable range is 5.5-55 V and the output vol-tage is 5 V,the load current is 800 mA,and the low frequency power rejection ratio is 96 dB.When the load current jumps from 1 mA to 800 mA in 1 μs,the maximum overshoot voltage at the output port is 26.6 mV and the response time is 8 μs,the undershoot voltage is 45.4 mV and the response time is 7 μs,which can meet the high voltage LDO performance requirements in the automotive grade local interconnect network(LIN) bus.

关 键 词：高压型低压差线性稳压器(LDO) 高压预调制 负载电流 摆率增强 电源抑制比(PSRR) 

分 类 号：TM44[电气工程—电器] TN43[电子电信—微电子学与固体电子学]