SoC芯片上I3C控制器IP的设计与验证  

Design and verification of I3C controller IP on SoC chip

作　　者：阮宇鹏 刘威[1,2,3,4] Ruan Yupeng;Liu Wei(School of Physics and Technology,Wuhan University,Wuhan 430072,China;School of Microelectronics,Wuhan University,Wuhan 430072,China;Hubei Luojia Laboratory,Wuhan 430072,China;Wuhan Institute of Quantum Technology,Wuhan 430072,China)

机构地区：[1]武汉大学物理科学与技术学院,湖北武汉430072 [2]武汉大学微电子学院,湖北武汉430072 [3]湖北珞珈实验室,湖北武汉430072 [4]武汉量子技术研究院,湖北武汉430072

出　　处：《电子技术应用》2023年第11期140-145,共6页Application of Electronic Technique

基　　金：国家重点研发计划(2022YFA1402503);湖北省技术创新专项(2022BEC035);湖北珞珈实验室专项基金(220100025)。

摘　　要：介绍一种可用APB总线配置的I3C控制器IP的设计与验证,I3C(Improved Inter Integrated Circuit),即改进的I2C,是一种新型的串行通信模块,同样是用于SoC设计中的外围IP模块。与I2C相比,它支持新的通信模式、更高的通信速度(高达12.5 MHz)、动态地址分配,并带有内置中断(IBI)。这些特性使得I3C与I2C相比优势明显,未来大规模地普及和商用也是大势所趋。首先介绍I3C协议的基本原理和优势,然后详细描述I3C控制器的设计架构和功能模块,在设计完成后,对I3C控制器进行了功能验证并展示其验证结果,证明了所提出方法的有效性和可靠性。This article presents the design and verification of an I3C controller IP that can be configured with an APB bus.I3C,which stands for Improved Inter Integrated Circuit,is a new serial communication module that is used as a peripheral IP module in System-on-Chip(SoC)designs.Compared to I2C,I3C supports new communication modes,higher communication speeds(up to 12.5 MHz),dynamic address allocation,and built-in interrupts(IBI).These features make I3C significantly advantageous over I2C and its large-scale popularity and commercial use is a future trend.This article first introduces the basic principles and advan‐tages of the I3C protocol and then describes the design architecture and functional modules of the I3C controller in detail.After completing the design,the I3C controller was functionally verified,and its verification results were demonstrated,proving the ef‐fectiveness and reliability of the proposed method.

关 键 词：I3C控制器 仲裁机制 通用命令代码 动态地址分配 

分 类 号：TN40[电子电信—微电子学与固体电子学]