Study of enhancement-mode GaN pFET with H plasma treated gate recess  

作　　者：Xiaotian Gao Guohao Yu Jiaan Zhou Zheming Wang Yu Li Jijun Zhang Xiaoyan Liang Zhongming Zeng Baoshun Zhang 

机构地区：[1]School of Materials Science and Engineering,Shanghai University,Shanghai 200444,China [2]Nanofabrication Facility,Suzhou Institute of Nano-Tech and Nano-Bionics,Chinese Academy of Sciences,Suzhou 215123,China [3]School of Nano-Tech and Nano-Bionics,University of Science and Technology of China,Hefei 230026,China

出　　处：《Journal of Semiconductors》2023年第11期63-68,共6页半导体学报（英文版）

基　　金：supported by the Youth Innovation Promotion Association of the Chinese Academy of Sciences(Grant No.2020321);the National Natural Science Foundation of China(Grant No.92163204).

摘　　要：This letter showcases the successful fabrication of an enhancement-mode(E-mode)buried p-channel GaN fieldeffect-transistor on a standard p-GaN/AlGaN/GaN-on-Si power HEMT substrate.The transistor exhibits a threshold voltage(VTH)of−3.8 V,a maximum ON-state current(ION)of 1.12 mA/mm,and an impressive ION/IOFF ratio of 10^(7).To achieve these remarkable results,an H plasma treatment was strategically applied to the gated p-GaN region,where a relatively thick GaN layer(i.e.,70 nm)was kept intact without aggressive gate recess.Through this treatment,the top portion of the GaN layer was converted to be hole-free,leaving only the bottom portion p-type and spatially separated from the etched GaN surface and gateoxide/GaN interface.This approach allows for E-mode operation while retaining high-quality p-channel characteristics.

关 键 词：GaN pFET E-mode H plasma treatment ION/IOFF ratio 

分 类 号：TN386[电子电信—物理电子学]