PCIe总线DMA高速传输系统的设计与实现  

Design and implementation of DMA high-speed transmission system based on PCIe

作　　者：刘佳宁 单伟 刘金鹏 Liu Jianing;Shan Wei;Liu Jinpeng(China Electronics Technology Group Corporation 58th Research Institute,Wuxi 214035,China)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214035

出　　处：《电子技术应用》2023年第12期85-89,共5页Application of Electronic Technique

摘　　要：针对数据传输系统中外设带宽受限、有效带宽低的问题,设计了一种PCIe总线的DMA高速传输系统。以FPGA为控制核心,采用PIO操作与DMA操作分时组合的控制模式实现全双工DMA读写通道的传输层协议。PIO操作配合中断实现指令与状态实时收发,DMA模块设计了一种两段式切片的裁剪机制实现PCIe协议的传输长度控制,发送模块设计请求仲裁逻辑实现请求事务的优先级仲裁,接收模块采用本地缓存TAG标号的方法实现请求回应的实时管理并解决回应乱序问题。最后通过时钟计数的方法测试传输速度,分析了影响读写传输速度的制约因素。经验证,DMA写操作有效带宽已经达到75%,非常接近80%的理论极限,DMA读操作也达到了60%。本设计解决了高速数据传输系统中的带受限宽问题,具有一定的工程应用价值。According to the issue of limited and low-effective peripheral bandwidth in transmission system,this paper designs a DMA high-speed transmission system based on PCIe.Taking FPGA as control unit,the transaction layer protocol of full duplex DMA read and write channels is realized with the time-sharing control method which combined PIO and DMA.Then PIO re-ceives the instructions and translates real-time status information,DMA controller takes charge of the transfer size with a twosection-slice clipping mechanism,transmit engine arbitrates all of the requests according to the priority logic,receive engine per-forms real-time management of completion packet by caching the TAG label,and solves out-of-order problem.At last,the trans-mission speed is tasted by means of clock counter,and the restriction factors affecting read/write transmission speed are ana-lyzed.By the practical verification,the effective bandwidth of DMA write has reached 75%,which is very close to the theoretical limit of 80%,and DMA read effective bandwidth has also reached 60%.The design solved the problem of bandwidth limitation in high-speed transmission system,and affords certain engineering application value.

关 键 词：PCIe总线 DMA 两段式切片 请求仲裁 回应乱序 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]