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作 者:刘传兴 何贵昆 马奎 杨发顺 Liu Chuanxing;He Guikun;Ma Kui;Yang Fashun(College of Big Data and Information Engineering,Guizhou University,Guiyang 550025,China;Key Laboratory of Micro-Nano-Electronics and Sofuvare Technology of Guizhou Province,Guiyang 550025,China;Semiconductor Power Derice Reliability Engineering Research Center of Minitry of Education,Guiyang 550025,China)
机构地区:[1]贵州大学大数据与信息工程学院,贵阳550025 [2]贵州省微纳电子与软件技术重点实验室,贵阳550025 [3]半导体功率器件可靠性教育部工程研究中心,贵阳550025
出 处:《半导体技术》2024年第2期143-150,共8页Semiconductor Technology
基 金:贵州省科技计划项目(黔科合支撑[2023]一般283)。
摘 要:基于双极型工艺设计了一种超低失调集成运算放大器。通过在差分输入级的有源负载处设计电阻修调网络来调整失调电压,并针对基极电流补偿不可控的问题设计了可修调的基极电流补偿结构来降低偏置电流,利用激光修调技术减小基极补偿结构引入的随机失调,有效改善了输入级失调。增益级采用结型场效应晶体管(JFET)差分对管以获得高增益,输出级采用全npn晶体管的乙类输出结构可满足大功率输出需求。芯片实测数据表明:在全温度范围内,失调电压最大为-25.3μV,失调电压温漂为0.025μV/℃,输入偏置电流为-3.535 nA,输入失调电流为-0.825 nA。实现了超低的失调电压、电流和温漂。An ultra-low offset integrated operational amplifier was designed based on bipolar process.The resistance correction network was designed at the active load of the differential input stage to adjust the offset voltage.For the problem of uncontrollable base current compensation,a tunable base current compensation structure was designed to reduce the bias current.The random offset introduced by the base compensation structure was reduced by laser correction technology,which effectively improved the input stage offset.The junction field effect transistor(JFET)differential pair tube was adopted in the gain stage to obtain high gain,and the Class B output structure of all npn transistors was adopted in the output stage to meet the demand of high power output.The measured data of the chip show that in the whole tempera-ture range,the offset voltage is up to-253μV,the offset voltage temperature drift is 0025μV/℃,the input bias current is-3535 nA,and the input offset current is-0825 nA.The ultra-low offset voltage,current and temperature drift are realized.
关 键 词:低失调 低温漂 基极电流补偿 激光修调 双极型工艺
分 类 号:TN722.77[电子电信—电路与系统] TN431.1
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