基于高速总线的密码SoC设计与实现  

Design and implementation of cryptographic SoC based on high speed bus

作　　者：王凯 曲英杰[1] Wang Kai;Qu Yingjie(School of Information Science&Technology,Qingdao University of Science and Technology,Qingdao 266061,China)

机构地区：[1]青岛科技大学信息科学技术学院,青岛266061

出　　处：《电子测量技术》2023年第17期1-7,共7页Electronic Measurement Technology

摘　　要：物联网、汽车制造、智慧医疗等行业的飞速发展,加快了端设备芯片的推广和应用,随之而来的芯片安全问题也暴露出来,传统的单片机或ARM-A系列的CPU芯片已经不能满足越来越复杂的应用需求。为解决目前端设备存在芯片安全防护不足、传输速度慢、功耗高、计算资源不足等问题,结合SoC设计理念,提出了一种基于高速总线的密码SoC设计方案,实现对端设备的传感器、芯片、硬件的动态状态获取,接收多种高速协议接口数据,加密存储及备份至云端等功能。该方案基于SoC设计,采用开源处理器,完成了一套由处理器、高速总线、硬件外设、加密单元相结合的低功耗加密监控芯片。综合及功耗分析和实验结果表明,实现了数据的高速可靠传输与加密,满足大容量数据快速加解密的需求;采用低功耗设计,性能无影响,功耗降低约20%。The rapid development of industries such as the Internet of Things,automobile manufacturing,and smart medical care has accelerated the promotion and application of end-point-device chips,and subsequent chip security issues have also been exposed.Traditional micro control unit(MCU)or ARM-A series CPU chips can no longer meet the increasingly complex application requirements.In order to solve the problems of insufficient chip security protection,slow transmission speed,high power consumption,and insufficient computing resources in current end devices,combined with the SoC design concept,this paper proposes a cryptographic SoC design scheme based on high-speed bus.This scheme realizes the acquisition of the dynamic status of the sensors,chips,and hardware of the end-device,receiving multiple high-speed protocol interface data,encrypted storage,and backup to the cloud.The solution uses an open-source processor to complete a low-power encryption monitoring chip that combines a processor,a high-speed bus,hardware peripherals,and an encryption unit.Synthesis and power analysis and experimental results show that high-speed and reliable data transmission and encryption are realized to meet the needs of fast encryption and decryption of large-capacity data;low power consumption design is adopted,performance is not affected,and power consumption is reduced by about 20%.

关 键 词：芯片设计 高速片内总线 高速数据传输 低功耗设计 

分 类 号：TP309.7[自动化与计算机技术—计算机系统结构]