多核处理器公平共享并行总线的方法  

Fair sharing of parallel buses for multi⁃core processors

作　　者：邵龙[1] SHAO Long(The 10th Institute of China Electronics Technology Group Corporation,Chengdu 610036,China)

机构地区：[1]中国电子科技集团公司第十研究所,四川成都610036

出　　处：《现代电子技术》2024年第3期25-28,共4页Modern Electronics Technique

摘　　要：针对综合化电子系统中多个功能运行于同一多核处理器的不同核同时访问同一并行总线的冲突避免以及实时性问题,提出一种基于最小访问颗粒度的多核处理器公平共享并行总线的方法,并详细介绍了该方法的设计实现及验证。该方法不仅通过为每核分配一个总线操作缓冲队列保障了同一核的总线操作先到先服务,而且通过单个读写操作周期的公平队列算法保障了每核总线操作的实时性。工程实践表明,该方法是一种多核处理器公平共享并行总线的有效方法。In order to avoid the collision and realize real⁃time performance of the multiple functions running on the different cores of the same multi⁃core processor and accessing the same parallel bus at the same time in the integrated electronic system,a method of multi⁃core processors sharing parallel bus fairly based on minimum access granularity is proposed.The design,implementation and verification of the method are introduced in detail.This method can guarantee not only the first⁃come⁃first⁃served bus operations for the same core by assigning a bus operation buffer queue to each core,but also the real⁃time operation for each core by a fair queuing algorithm of a single read/write operation cycle.This engineering practice shows that the proposed method is an effective method for the multi⁃core processors to share parallel bus fairly.

关 键 词：综合化电子系统 多核处理器 共享并行总线 冲突 公平队列算法 缓冲队列 

分 类 号：TN91-34[电子电信—通信与信息系统]