面向SPICE仿真的专用浮点计算单元研究  

Research on special floating-point computing unit for SPICE simulation

作　　者：倪文威 左芸帆 闫浩 NI Wenwei;ZUO Yunfan;YAN Hao(School of Integrated Circuits,Southeast University,Nanjing 210096,China)

机构地区：[1]东南大学集成电路学院,南京210096

出　　处：《集成电路与嵌入式系统》2024年第2期64-69,共6页INTEGRATED CIRCUITS AND EMBEDDED SYSTEMS

基　　金：国家自然科学基金面上项目——先进工艺与低电压下的单元及互连延时建模(62274034)。

摘　　要：稀疏矩阵求解是SPICE仿真的重要部分,目前求解所使用的算子通常为通用浮点计算单元,运算速度受限。本文通过改进通用浮点算子中加/减和乘单元,使其在SPICE仿真专用背景下能实现更快的求解速度。对传统加减单元使用舍入并行延时优化算法和双路径设计方案,利用香农扩展、非精确前导零补偿等手段优化了电路的关键路径延时。对传统乘单元通过改变传统压缩拓扑层结构、优化注入值算法中舍入进位等逻辑改善了相关延时。最终,在TSMC 28 nm工艺下对双精度浮点求解速度分别为0.46 ns和0.79 ns,对比Synopsys公司的DW库单元延时分别减小33.4%和7.1%,面积分别减小4.62%和1.6%。实验结果表明,改进后浮点单元能有效降低矩阵单次求解步骤的时间,在一定程度上加速瞬态仿真整体速度。Sparse matrix solving is an important part of SPICE simulation.The operators currently used for solving are usually general-purpose floating-point calculation units.In order to solve the problem of double-precision floating-point speed in SPICE simulation,this article improves the addition/subtraction and multiplication units in general floating-point operators to enable faster solution speed in the context of SPICE simulation.The rounding parallel delay optimization algorithm and dual-path design scheme are used for the traditional addition and subtraction unit,and the critical path delay of the circuit is optimized by means of Shannon expansion and inexact leading zero compensation.For the traditional multiplication unit,the related delay is improved by changing the traditional compression topology layer structure and optimizing logic such as rounding and carry in the injection value algorithm.In the end,the double-precision floating-point solution achieved delays of 0.46 ns and 0.79 ns respectively under the TSMC 28 nm process.Compared with Synopsys'DW library unit,the delays are reduced by 33.4%and 7.1%respectively,and the area is reduced by 4.62%and 1.6%respectively.The experiment results show that the improved floating-point unit can effectively reduce the time of a single matrix solution step and accelerate the overall speed of transient simulation to a certain extent.

关 键 词：专用浮点计算单元 双精度 关键路径 稀疏矩阵 

分 类 号：TN431.2[电子电信—微电子学与固体电子学]