Flash片内数据的高速回读系统设计  

Design of high-speed data read back system in Flash

作　　者：李晴爽 文丰[1] 李辉景[1] LI Qingshuang;WEN Feng;LI Huijing(State Key Laboratory of Electronic Testing Technology,North University of China,Taiyuan 030051,China)

机构地区：[1]中北大学电子测试技术国家重点实验室,太原030051

出　　处：《集成电路与嵌入式系统》2024年第2期81-85,共5页INTEGRATED CIRCUITS AND EMBEDDED SYSTEMS

摘　　要：针对导弹飞行后数据记录装置的部分接口受损而无法顺利回读飞行数据的问题,研发了可以高速回读存储芯片片内数据的Flash读写设备,在FPGA内置的LVDS收发器基础上利用Aurora协议设计了每通道速率可达1.5625 Gb/s的高速并行收发链路,以及在串/并转换的基础上设计了传输速度较慢的备用串行读数链路。系统实现了高速读数接口和备用读数接口皆可顺利将Flash芯片片内的数据无丢帧地回读传输至测试台进行评估、分析、利用,具有硬件设计简单、回读数据方便快捷的特点。Aiming at the problem that part of the interface of the missile post-flight data recording device is damaged and the flight data cannot be read back smoothly.A Flash read-write device that can read back the data in the memory chip at a high speed is developed,and a high-speed parallel transceiver link with a rate of 1.5625 Gb/s per channel is designed by using Aurora protocol on the basis of the built-in LVDS transceiver in FPGA,and an alternate serial readout link with a low transmission rate is designed on the basis of serial parallel conversion.Both the high-speed reading interface and the standby reading interface can transmit the data in the Flash chip to the test table for evaluation and utilization without losing frames.It has the features of simple hardware design,convenient and fast reading back data.

关 键 词：数据回读 Aurora协议 Flash读写 FPGA 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]